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Searched refs:hactive (Results 1 – 25 of 44) sorted by relevance

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/drivers/video/fbdev/geode/
Ddisplay_gx.c61 int hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal; in gx_set_mode() local
129 hactive = info->var.xres; in gx_set_mode()
130 hblankstart = hactive; in gx_set_mode()
143 write_dc(par, DC_H_ACTIVE_TIMING, (hactive - 1) | in gx_set_mode()
Ddisplay_gx1.c81 int hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal; in gx1_set_mode() local
147 hactive = info->var.xres; in gx1_set_mode()
148 hblankstart = hactive; in gx1_set_mode()
161 val = (hactive - 1) | ((htotal - 1) << 16); in gx1_set_mode()
Dlxfb_ops.c349 int hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal; in lx_set_mode() local
464 hactive = info->var.xres; in lx_set_mode()
465 hblankstart = hactive; in lx_set_mode()
478 write_dc(par, DC_H_ACTIVE_TIMING, (hactive - 1) | ((htotal - 1) << 16)); in lx_set_mode()
/drivers/gpu/drm/panel/
Dpanel-olimex-lcd-olinuxino.c30 u32 hactive; member
161 lcd_mode->hactive, in lcd_olinuxino_get_modes()
168 mode->hdisplay = lcd_mode->hactive; in lcd_olinuxino_get_modes()
169 mode->hsync_start = lcd_mode->hactive + lcd_mode->hfp; in lcd_olinuxino_get_modes()
170 mode->hsync_end = lcd_mode->hactive + lcd_mode->hfp + in lcd_olinuxino_get_modes()
172 mode->htotal = lcd_mode->hactive + lcd_mode->hfp + in lcd_olinuxino_get_modes()
Dpanel-simple.c136 dt->hactive.typ, dt->vactive.typ); in panel_simple_get_timings_modes()
390 if (!PANEL_SIMPLE_BOUNDS_CHECK(ot, dt, hactive) || in panel_simple_parse_panel_timing_node()
567 .hactive = { 800, 800, 800 },
616 .hactive = { 1280, 1280, 1280 },
736 .hactive = { 800, 800, 800 },
811 .hactive = { 1920, 1920, 1920 },
840 .hactive = { 1920, 1920, 1920 },
869 .hactive = { 1920, 1920, 1920 },
1183 .hactive = { 1024, 1024, 1024 },
1212 .hactive = { 1280, 1280, 1280 },
[all …]
Dpanel-seiko-43wvf1g.c77 dt->hactive.typ, dt->vactive.typ); in seiko_panel_get_fixed_modes()
313 .hactive = { 800, 800, 800 },
/drivers/media/i2c/
Dbt819.c61 int hactive; member
181 ((timing->hactive >> 8) & 0x03); in bt819_init()
185 init[0x07 * 2 - 1] = timing->hactive & 0xff; in bt819_init()
272 ((timing->hactive >> 8) & 0x03)); in bt819_s_std()
276 bt819_write(decoder, 0x07, timing->hactive & 0xff); in bt819_s_std()
/drivers/video/
Dvideomode.c17 vm->hactive = dt->hactive.typ; in videomode_from_timing()
/drivers/video/fbdev/core/
Dfbmon.c1019 u32 hactive; member
1154 timings->hactive); in fb_timings_vfreq()
1155 timings->htotal = timings->hactive + timings->hblank; in fb_timings_vfreq()
1165 timings->hactive); in fb_timings_hfreq()
1166 timings->htotal = timings->hactive + timings->hblank; in fb_timings_hfreq()
1173 timings->hactive); in fb_timings_dclk()
1174 timings->htotal = timings->hactive + timings->hblank; in fb_timings_dclk()
1248 timings->hactive = var->xres; in fb_get_mode()
1316 fbmode->xres = vm->hactive; in fb_videomode_from_videomode()
1342 htotal = vm->hactive + vm->hfront_porch + vm->hback_porch + in fb_videomode_from_videomode()
[all …]
/drivers/gpu/drm/xen/
Dxen_drm_front_conn.c73 videomode.hactive = pipeline->width; in connector_get_modes()
75 width = videomode.hactive + videomode.hfront_porch + in connector_get_modes()
/drivers/gpu/ipu-v3/
Dipu-di.c205 u32 h_total = sig->mode.hactive + sig->mode.hsync_len + in ipu_di_sync_config_interlaced()
251 .repeat_count = sig->mode.hactive, in ipu_di_sync_config_interlaced()
268 u32 h_total = sig->mode.hactive + sig->mode.hsync_len + in ipu_di_sync_config_noninterlaced()
307 .repeat_count = sig->mode.hactive, in ipu_di_sync_config_noninterlaced()
352 .repeat_count = sig->mode.hactive, in ipu_di_sync_config_noninterlaced()
564 di->id, sig->mode.hactive, sig->mode.vactive); in ipu_di_init_sync_panel()
/drivers/gpu/drm/exynos/
Dexynos_drm_mic.c169 MIC_V_PERIOD_LINE(vm.hsync_len + vm.hactive + in mic_set_porch_timing()
183 reg = MIC_IMG_H_SIZE(vm->hactive) + in mic_set_img_size()
194 DRM_DEV_DEBUG(mic->dev, "w: %u, h: %u\n", vm.hactive, vm.vactive); in mic_set_output_timing()
195 bs_size_2d = ((vm.hactive >> 2) << 1) + (vm.vactive % 4); in mic_set_output_timing()
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.c100 unsigned int hactive, in get_refcyc_per_delivery() argument
111 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery()
709 hactive_half = pipe_param.dest.hactive / 2; in get_surf_rq_param()
1268 dst->hactive, in dml_rq_dlg_get_dlg_params()
1280 dst->hactive, in dml_rq_dlg_get_dlg_params()
1307 dst->hactive, in dml_rq_dlg_get_dlg_params()
1319 dst->hactive, in dml_rq_dlg_get_dlg_params()
1350 dst->hactive, in dml_rq_dlg_get_dlg_params()
1361 dst->hactive, in dml_rq_dlg_get_dlg_params()
1386 dst->hactive, in dml_rq_dlg_get_dlg_params()
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20v2.c123 unsigned int hactive, in get_refcyc_per_delivery() argument
134 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery()
1214 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
1225 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
1250 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
1261 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
1289 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
1299 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
1321 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
1331 dst->hactive, in dml20v2_rq_dlg_get_dlg_params()
Ddisplay_rq_dlg_calc_20.c123 unsigned int hactive, in get_refcyc_per_delivery() argument
134 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery()
1214 dst->hactive, in dml20_rq_dlg_get_dlg_params()
1225 dst->hactive, in dml20_rq_dlg_get_dlg_params()
1250 dst->hactive, in dml20_rq_dlg_get_dlg_params()
1261 dst->hactive, in dml20_rq_dlg_get_dlg_params()
1289 dst->hactive, in dml20_rq_dlg_get_dlg_params()
1299 dst->hactive, in dml20_rq_dlg_get_dlg_params()
1321 dst->hactive, in dml20_rq_dlg_get_dlg_params()
1331 dst->hactive, in dml20_rq_dlg_get_dlg_params()
/drivers/media/pci/tw68/
Dtw68-video.c255 int hactive, hdelay, hscale; in tw68_set_scale() local
279 hactive = norm->h_stop - norm->h_start + 1; in tw68_set_scale()
281 hscale = (hactive * 256) / (width); in tw68_set_scale()
294 hactive, hdelay, hscale, vactive, vdelay, vscale); in tw68_set_scale()
299 ((hactive & 0x300) >> 8); in tw68_set_scale()
301 __func__, comb, vdelay, vactive, hdelay, hactive); in tw68_set_scale()
306 tw_writeb(TW68_HACTIVE_LO, hactive & 0xff); in tw68_set_scale()
/drivers/gpu/drm/i915/display/
Dvlv_dsi.c1042 u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp; in bxt_dsi_get_pipe_config() local
1077 hactive = adjusted_mode->crtc_hdisplay; in bxt_dsi_get_pipe_config()
1106 adjusted_mode->crtc_htotal = hactive + hfp + hsync + hbp; in bxt_dsi_get_pipe_config()
1236 u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp; in set_dsi_timings() local
1238 hactive = adjusted_mode->crtc_hdisplay; in set_dsi_timings()
1244 hactive /= 2; in set_dsi_timings()
1246 hactive += intel_dsi->pixel_overlap; in set_dsi_timings()
1257 hactive = txbyteclkhs(hactive, bpp, lane_count, in set_dsi_timings()
1280 I915_WRITE(MIPI_HACTIVE_AREA_COUNT(port), hactive); in set_dsi_timings()
Dicl_dsi.c281 u16 hactive = adjusted_mode->crtc_hdisplay; in configure_dual_link_mode() local
285 dl_buffer_depth = hactive / 2 + intel_dsi->pixel_overlap; in configure_dual_link_mode()
775 u16 htotal, hactive, hsync_start, hsync_end, hsync_size; in gen11_dsi_set_transcoder_timings() local
780 hactive = adjusted_mode->crtc_hdisplay; in gen11_dsi_set_transcoder_timings()
794 hactive /= 2; in gen11_dsi_set_transcoder_timings()
796 hactive += intel_dsi->pixel_overlap; in gen11_dsi_set_transcoder_timings()
805 if (intel_dsi->pixel_format == MIPI_DSI_FMT_RGB666 && hactive % 4 != 0) in gen11_dsi_set_transcoder_timings()
812 (hactive - 1) | ((htotal - 1) << 16)); in gen11_dsi_set_transcoder_timings()
/drivers/media/pci/cx18/
Dcx18-av-core.c285 int hblank, hactive, burst, vblank, vactive, sc; in cx18_av_std_setup() local
348 hactive = 720; in cx18_av_std_setup()
407 hactive = 720; in cx18_av_std_setup()
470 hblank, hactive, vblank, vactive, vblank656, in cx18_av_std_setup()
478 (((hblank >> 8) & 0x3) | (hactive << 4)) & 0xff); in cx18_av_std_setup()
479 cx18_av_write(cx, 0x472, hactive >> 4); in cx18_av_std_setup()
/drivers/video/fbdev/omap2/omapfb/dss/
Ddisplay.c265 ovt->x_res = vm->hactive; in videomode_to_omap_video_timings()
298 vm->hactive = ovt->x_res; in omap_video_timings_to_videomode()
/drivers/gpu/drm/omapdrm/displays/
Dpanel-dsi-cm.c895 r = dsicm_set_update_window(ddata, 0, 0, ddata->vm.hactive, in dsicm_update()
1027 ddata->vm.hactive * ddata->vm.vactive * 3); in dsicm_memory_read()
1126 if (mode->hdisplay != ddata->vm.hactive) in dsicm_check_timings()
1136 ddata->vm.hactive, ddata->vm.vactive); in dsicm_check_timings()
1191 ddata->vm.hactive * ddata->vm.vactive * 60; in dsicm_probe_of()
1253 ddata->vm.hactive = 864; in dsicm_probe()
/drivers/video/fbdev/intelfb/
Dintelfbhw.c1047 u32 hsync_start, hsync_end, hblank_start, hblank_end, htotal, hactive; in intelfbhw_mode_to_hw() local
1173 hactive = var->xres; in intelfbhw_mode_to_hw()
1174 hsync_start = hactive + var->right_margin; in intelfbhw_mode_to_hw()
1177 hblank_start = hactive; in intelfbhw_mode_to_hw()
1181 hactive, hsync_start, hsync_end, htotal, hblank_start, in intelfbhw_mode_to_hw()
1198 hactive--; in intelfbhw_mode_to_hw()
1199 if (check_overflow(hactive, HACTIVE_MASK, "CRTC hactive")) in intelfbhw_mode_to_hw()
1236 *ht = (htotal << HTOTAL_SHIFT) | (hactive << HACTIVE_SHIFT); in intelfbhw_mode_to_hw()
1245 *ss = (hactive << SRC_SIZE_HORIZ_SHIFT) | in intelfbhw_mode_to_hw()
/drivers/video/fbdev/vermilion/
Dvermilion.c767 u32 htotal, hactive, hblank_start, hblank_end, hsync_start, hsync_end; in vmlfb_set_par_locked() local
781 hactive = var->xres; in vmlfb_set_par_locked()
784 hsync_start = hactive + var->right_margin; in vmlfb_set_par_locked()
829 VML_WRITE32(par, VML_HTOTAL_A, ((htotal - 1) << 16) | (hactive - 1)); in vmlfb_set_par_locked()
/drivers/gpu/drm/omapdrm/dss/
Dhdmi5_core.c307 video_cfg->v_fc_config.vm.hactive *= 2; in hdmi_core_init()
337 REG_FLD_MOD(base, HDMI_CORE_FC_INHACTIV1, vm->hactive >> 8, 4, 0); in hdmi_core_video_config()
338 REG_FLD_MOD(base, HDMI_CORE_FC_INHACTIV0, vm->hactive & 0xFF, 7, 0); in hdmi_core_video_config()
/drivers/gpu/drm/arm/
Dmalidp_hw.c375 val = MALIDP_DE_H_ACTIVE(mode->hactive) | MALIDP_DE_V_ACTIVE(mode->vactive); in malidp500_modeset()
476 unsigned long htotal = vm->hactive + vm->hfront_porch + in malidp500_se_calc_mclk()
687 val = MALIDP_DE_H_ACTIVE(mode->hactive) | MALIDP_DE_V_ACTIVE(mode->vactive); in malidp550_modeset()
817 unsigned long htotal = vm->hactive + vm->hfront_porch + in malidp550_se_calc_mclk()

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