/drivers/gpu/drm/ |
D | drm_fourcc.c | 160 …{ .format = DRM_FORMAT_C8, .depth = 8, .num_planes = 1, .cpp = { 1, 0, 0 }, .hsub = 1, .vsub = 1… in __drm_format_info() 161 …{ .format = DRM_FORMAT_RGB332, .depth = 8, .num_planes = 1, .cpp = { 1, 0, 0 }, .hsub = 1, .vsub… in __drm_format_info() 162 …{ .format = DRM_FORMAT_BGR233, .depth = 8, .num_planes = 1, .cpp = { 1, 0, 0 }, .hsub = 1, .vsub… in __drm_format_info() 163 …{ .format = DRM_FORMAT_XRGB4444, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsu… in __drm_format_info() 164 …{ .format = DRM_FORMAT_XBGR4444, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsu… in __drm_format_info() 165 …{ .format = DRM_FORMAT_RGBX4444, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsu… in __drm_format_info() 166 …{ .format = DRM_FORMAT_BGRX4444, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsu… in __drm_format_info() 167 …{ .format = DRM_FORMAT_ARGB4444, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsu… in __drm_format_info() 168 …{ .format = DRM_FORMAT_ABGR4444, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsu… in __drm_format_info() 169 …{ .format = DRM_FORMAT_RGBA4444, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsu… in __drm_format_info() [all …]
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D | drm_fb_cma_helper.c | 84 h_div = fb->format->hsub; in drm_fb_cma_get_gem_addr()
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D | drm_gem_framebuffer_helper.c | 157 unsigned int width = mode_cmd->width / (i ? info->hsub : 1); in drm_gem_fb_create_with_funcs()
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/drivers/gpu/drm/sun4i/ |
D | sun8i_vi_scaler.c | 877 if (format->hsub == 1 && format->vsub == 1) { in sun8i_vi_scaler_set_coeff() 950 if (format->hsub == 2 && format->vsub == 2) { in sun8i_vi_scaler_setup() 962 if (format->hsub == 1 && format->vsub == 1) in sun8i_vi_scaler_setup() 985 SUN8I_VI_SCALER_SIZE(src_w / format->hsub, in sun8i_vi_scaler_setup() 989 hscale / format->hsub); in sun8i_vi_scaler_setup()
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D | sun8i_vi_layer.c | 97 if (format->hsub > 1) { in sun8i_vi_layer_update_coord() 100 mask = format->hsub - 1; in sun8i_vi_layer_update_coord() 120 (state->src.x1 >> 16) & ~(format->hsub - 1), in sun8i_vi_layer_update_coord() 134 subsampled = format->hsub > 1 || format->vsub > 1; in sun8i_vi_layer_update_coord() 277 src_x = (state->src.x1 >> 16) & ~(format->hsub - 1); in sun8i_vi_layer_update_buffer() 293 dx /= format->hsub; in sun8i_vi_layer_update_buffer()
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/drivers/media/platform/sunxi/sun4i-csi/ |
D | sun4i_v4l2.c | 30 .hsub = 2, 119 width = ALIGN(pix->width, _fmt->hsub); in _sun4i_csi_try_fmt() 123 pix->width = clamp(width, _fmt->hsub, CSI_MAX_WIDTH); in _sun4i_csi_try_fmt() 127 unsigned int hsub = i > 0 ? _fmt->hsub : 1; in _sun4i_csi_try_fmt() local 131 bpl = pix->width / hsub * _fmt->bpp[i] / 8; in _sun4i_csi_try_fmt()
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D | sun4i_csi.h | 100 unsigned int hsub; member
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/drivers/gpu/drm/msm/disp/mdp5/ |
D | mdp5_smp.c | 123 int i, hsub, nplanes, nlines; in mdp5_smp_calculate() local 128 hsub = info->hsub; in mdp5_smp_calculate() 144 if (hdecim && (hsub > 1)) in mdp5_smp_calculate() 145 hsub = 1; in mdp5_smp_calculate() 152 fetch_stride = width * cpp / (i ? hsub : 1); in mdp5_smp_calculate()
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D | mdp5_plane.c | 663 phasex_steps[COMP_1_2] = phasex_step / info->hsub; in calc_scalex_steps() 704 sub = horz ? info->hsub : info->vsub; in get_scale_config() 758 roi_w /= info->hsub; in mdp5_write_pixel_ext()
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/drivers/media/platform/vsp1/ |
D | vsp1_wpf.c | 465 unsigned int hsub = i > 0 ? fmtinfo->hsub : 1; in wpf_configure_partition() local 472 mem.addr[i] += offset / hsub in wpf_configure_partition() 507 unsigned int hsub = i > 0 ? fmtinfo->hsub : 1; in wpf_configure_partition() local 509 mem.addr[i] += hoffset / hsub in wpf_configure_partition()
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D | vsp1_pipe.h | 45 unsigned int hsub; member
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D | vsp1_video.c | 133 width = round_down(width, info->hsub); in __vsp1_video_try_format() 137 pix->width = clamp(width, info->hsub, VSP1_VIDEO_MAX_WIDTH); in __vsp1_video_try_format() 146 unsigned int hsub = i > 0 ? info->hsub : 1; in __vsp1_video_try_format() local 152 pix->width / hsub * info->bpp[i] / 8, in __vsp1_video_try_format()
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D | vsp1_rpf.c | 297 + crop.left / fmtinfo->hsub in rpf_configure_partition()
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/drivers/gpu/drm/arm/display/komeda/ |
D | komeda_framebuffer.c | 221 if ((src_x % info->hsub) || (src_w % info->hsub) || in komeda_fb_check_src_coords() 256 plane_x = x / (plane ? fb->format->hsub : 1); in komeda_fb_get_pixel_addr()
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/drivers/media/platform/qcom/camss/ |
D | camss-video.c | 39 struct fract hsub[3]; member 257 bytesperline = pix->width / f->hsub[i].numerator * in video_mbus_to_pix_mp() 258 f->hsub[i].denominator * f->bpp[i] / 8; in video_mbus_to_pix_mp() 617 bpl = pix_mp->width / fi->hsub[i].numerator * in __video_try_fmt() 618 fi->hsub[i].denominator * fi->bpp[i] / 8; in __video_try_fmt()
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/drivers/gpu/drm/rockchip/ |
D | rockchip_drm_fb.c | 70 unsigned int width = mode_cmd->width / (i ? info->hsub : 1); in rockchip_user_fb_create()
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D | rockchip_drm_vop.c | 318 uint16_t cbcr_src_w = src_w / info->hsub; in scl_vop_cal_scl_fac() 858 int hsub = fb->format->hsub; in vop_plane_atomic_update() local 865 offset = (src->x1 >> 16) * bpp / hsub; in vop_plane_atomic_update()
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/drivers/gpu/drm/i915/display/ |
D | intel_sprite.c | 289 u32 src_x, src_y, src_w, src_h, hsub, vsub; in intel_plane_check_src_coordinates() local 313 hsub = fb->format->hsub; in intel_plane_check_src_coordinates() 316 hsub = vsub = max(fb->format->hsub, fb->format->vsub); in intel_plane_check_src_coordinates() 319 if (src_x % hsub || src_w % hsub) { in intel_plane_check_src_coordinates() 321 src_x, src_w, hsub, rotated ? "rotated " : ""); in intel_plane_check_src_coordinates()
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/drivers/gpu/drm/imx/ |
D | ipuv3-plane.c | 119 x /= fb->format->hsub; in drm_plane_state_to_ubo() 138 x /= fb->format->hsub; in drm_plane_state_to_vbo() 474 if (((state->src.x1 >> 16) & (fb->format->hsub - 1)) || in ipu_plane_atomic_check()
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/drivers/media/platform/ |
D | rcar_fdp1.c | 287 u8 hsub; member 1428 unsigned int hsub = i > 0 ? fmt->hsub : 1; in fdp1_compute_stride() local 1435 pix->width / hsub * fmt->bpp[i] / 8, in fdp1_compute_stride() 1500 width = round_down(pix->width, fmt->hsub); in fdp1_try_fmt_output()
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/drivers/gpu/drm/msm/ |
D | msm_fb.c | 172 unsigned int width = mode_cmd->width / (i ? info->hsub : 1); in msm_framebuffer_init()
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/drivers/gpu/drm/tegra/ |
D | fb.c | 141 unsigned int width = cmd->width / (i ? info->hsub : 1); in tegra_fb_create()
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/drivers/gpu/drm/arm/ |
D | malidp_planes.c | 234 if ((info->hsub != 1) || (info->vsub != 1)) { in malidp_format_mod_supported() 244 if ((info->hsub == 1) || (info->vsub == 1)) { in malidp_format_mod_supported()
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/drivers/gpu/drm/armada/ |
D | armada_plane.c | 59 x /= format->hsub; in armada_drm_plane_calc()
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/drivers/gpu/drm/omapdrm/ |
D | omap_fb.c | 90 + (x * format->cpp[n] / (n == 0 ? 1 : format->hsub)) in get_linear_addr()
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