| /drivers/gpu/drm/panel/ |
| D | panel-simple.c | 518 .hsync_start = 480 + 2,
543 .hsync_start = 800 + 0,
594 .hsync_start = 1024 + 156,
639 .hsync_start = 1366 + 20,
663 .hsync_start = 1366 + 40,
686 .hsync_start = 1366 + 48,
709 .hsync_start = 1920 + 172,
765 .hsync_start = 1280 + 82,
789 .hsync_start = 800 + 40,
898 .hsync_start = 1920 + 88,
[all …]
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| D | panel-arm-versatile.c | 139 .hsync_start = 320 + 6,
163 .hsync_start = 640 + 24,
186 .hsync_start = 176 + 2,
210 .hsync_start = 240 + 10,
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| D | panel-tpo-tpg110.c | 112 .hsync_start = 800 + 40,
129 .hsync_start = 640 + 24,
146 .hsync_start = 480 + 2,
163 .hsync_start = 480 + 2,
180 .hsync_start = 400 + 20,
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| D | panel-ilitek-ili9322.c | 545 .hsync_start = 320 + 359,
559 .hsync_start = 360 + 35,
574 .hsync_start = 320 + 38,
589 .hsync_start = 640 + 252,
603 .hsync_start = 720 + 252,
618 .hsync_start = 640 + 3,
633 .hsync_start = 720 + 3,
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| /drivers/gpu/drm/ |
| D | drm_modes.c | 279 drm_mode->hsync_start = drm_mode->hsync_end - in drm_cvt_mode()
281 drm_mode->hsync_start += CVT_H_GRANULARITY - in drm_cvt_mode()
282 drm_mode->hsync_start % CVT_H_GRANULARITY; in drm_cvt_mode()
314 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; in drm_cvt_mode()
510 drm_mode->hsync_start = hdisplay_rnd + hfront_porch; in drm_gtf_mode_complex()
511 drm_mode->hsync_end = drm_mode->hsync_start + hsync; in drm_gtf_mode_complex()
591 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch; in drm_display_mode_from_videomode()
592 dmode->hsync_end = dmode->hsync_start + vm->hsync_len; in drm_display_mode_from_videomode()
632 vm->hfront_porch = dmode->hsync_start - dmode->hdisplay; in drm_display_mode_to_videomode()
633 vm->hsync_len = dmode->hsync_end - dmode->hsync_start; in drm_display_mode_to_videomode()
[all …]
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| /drivers/gpu/drm/gma500/ |
| D | mdfld_tmd_vid.c | 49 mode->hsync_start = mode->hdisplay + \ in tmd_vid_get_config_mode()
52 mode->hsync_end = mode->hsync_start + \ in tmd_vid_get_config_mode()
69 dev_dbg(dev->dev, "HSS is %d\n", mode->hsync_start); in tmd_vid_get_config_mode()
79 mode->hsync_start = 487; in tmd_vid_get_config_mode()
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| D | oaktrail_lvds.c | 228 mode->hsync_start = mode->hdisplay + \ in oaktrail_lvds_get_configuration_mode()
231 mode->hsync_end = mode->hsync_start + \ in oaktrail_lvds_get_configuration_mode()
248 pr_info("HSS is %d\n", mode->hsync_start); in oaktrail_lvds_get_configuration_mode()
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| D | mdfld_tpo_vid.c | 40 mode->hsync_start = 873; in tpo_vid_get_config_mode()
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| D | mdfld_dsi_dpi.c | 438 pclk_hfp = mode->hsync_start - mode->hdisplay; in mdfld_dsi_dpi_timing_calculation()
439 pclk_hsync = mode->hsync_end - mode->hsync_start; in mdfld_dsi_dpi_timing_calculation()
699 adjusted_mode->hsync_start = fixed_mode->hsync_start; in mdfld_dsi_dpi_mode_fixup()
802 ((mode->hsync_end - 1) << 16) | (mode->hsync_start - 1)); in mdfld_set_pipe_timing()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_encoders.c | 155 unsigned hover = native_mode->hsync_start - native_mode->hdisplay; in amdgpu_panel_mode_fixup()
157 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start; in amdgpu_panel_mode_fixup()
167 adjusted_mode->hsync_start = native_mode->hdisplay + hover; in amdgpu_panel_mode_fixup()
168 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width; in amdgpu_panel_mode_fixup()
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| /drivers/gpu/drm/msm/disp/mdp4/ |
| D | mdp4_dsi_encoder.c | 61 hsync_start_x = (mode->htotal - mode->hsync_start); in mdp4_dsi_encoder_mode_set()
62 hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1; in mdp4_dsi_encoder_mode_set()
70 MDP4_DSI_HSYNC_CTRL_PULSEW(mode->hsync_end - mode->hsync_start) | in mdp4_dsi_encoder_mode_set()
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| D | mdp4_dtv_encoder.c | 111 hsync_start_x = (mode->htotal - mode->hsync_start); in mdp4_dtv_encoder_mode_set()
112 hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1; in mdp4_dtv_encoder_mode_set()
120 MDP4_DTV_HSYNC_CTRL_PULSEW(mode->hsync_end - mode->hsync_start) | in mdp4_dtv_encoder_mode_set()
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| D | mdp4_lcdc_encoder.c | 282 hsync_start_x = (mode->htotal - mode->hsync_start); in mdp4_lcdc_encoder_mode_set()
283 hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1; in mdp4_lcdc_encoder_mode_set()
291 MDP4_LCDC_HSYNC_CTRL_PULSEW(mode->hsync_end - mode->hsync_start) | in mdp4_lcdc_encoder_mode_set()
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| /drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_encoder_phys_vid.c | 46 || (mode->hsync_start < mode->hdisplay) in drm_mode_to_intf_timing_params()
49 || (mode->hsync_end < mode->hsync_start) in drm_mode_to_intf_timing_params()
53 mode->hsync_start, mode->hsync_end, in drm_mode_to_intf_timing_params()
75 timing->h_front_porch = mode->hsync_start - mode->hdisplay; in drm_mode_to_intf_timing_params()
78 timing->hsync_pulse_width = mode->hsync_end - mode->hsync_start; in drm_mode_to_intf_timing_params()
259 mode.hsync_start >>= 1; in dpu_encoder_phys_vid_setup_timing_engine()
266 mode.hsync_start, mode.hsync_end); in dpu_encoder_phys_vid_setup_timing_engine()
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| /drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_encoder.c | 147 hsync_start_x = (mode->htotal - mode->hsync_start); in mdp5_vid_encoder_mode_set()
148 hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1; in mdp5_vid_encoder_mode_set()
161 display_v_start += mode->htotal - mode->hsync_start; in mdp5_vid_encoder_mode_set()
162 display_v_end -= mode->hsync_start - mode->hdisplay; in mdp5_vid_encoder_mode_set()
168 MDP5_INTF_HSYNC_CTL_PULSEW(mode->hsync_end - mode->hsync_start) | in mdp5_vid_encoder_mode_set()
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| /drivers/gpu/drm/radeon/ |
| D | radeon_encoders.c | 331 unsigned hover = native_mode->hsync_start - native_mode->hdisplay; in radeon_panel_mode_fixup()
333 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start; in radeon_panel_mode_fixup()
345 adjusted_mode->hsync_start = native_mode->hdisplay + hover; in radeon_panel_mode_fixup()
346 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width; in radeon_panel_mode_fixup()
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| D | radeon_legacy_crtc.c | 60 int hsync_start; in radeon_legacy_rmx_mode_set() local
90 hsync_start = mode->crtc_hsync_start - 8; in radeon_legacy_rmx_mode_set()
92 fp_h_sync_strt_wid = ((hsync_start & 0x1fff) in radeon_legacy_rmx_mode_set()
581 int hsync_start; in radeon_set_crtc_timing() local
628 hsync_start = mode->crtc_hsync_start - 8; in radeon_set_crtc_timing()
630 crtc_h_sync_strt_wid = ((hsync_start & 0x1fff) in radeon_set_crtc_timing()
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| /drivers/gpu/drm/shmobile/ |
| D | shmob_drm_crtc.c | 100 value = (((mode->hsync_end - mode->hsync_start) / 8) << 16) /* HSYNW */ in shmob_drm_crtc_setup_geometry()
101 | (mode->hsync_start / 8); /* HSYNP */ in shmob_drm_crtc_setup_geometry()
105 | (((mode->hsync_end - mode->hsync_start) & 7) << 8) in shmob_drm_crtc_setup_geometry()
106 | (mode->hsync_start & 7); in shmob_drm_crtc_setup_geometry()
608 mode->hsync_start = sdev->pdata->panel.mode.hsync_start; in shmob_drm_connector_get_modes()
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| /drivers/gpu/drm/bridge/adv7511/ |
| D | adv7533.c | 34 hsw = mode->hsync_end - mode->hsync_start; in adv7511_dsi_config_timing_gen()
35 hfp = mode->hsync_start - mode->hdisplay; in adv7511_dsi_config_timing_gen()
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| /drivers/media/platform/xilinx/ |
| D | xilinx-vtc.h | 23 unsigned int hsync_start; member
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| /drivers/gpu/drm/tilcdc/ |
| D | tilcdc_crtc.c | 317 hfp = mode->hsync_start - mode->hdisplay; in tilcdc_crtc_set_mode()
318 hsw = mode->hsync_end - mode->hsync_start; in tilcdc_crtc_set_mode()
636 adjusted_mode->hskew = mode->hsync_end - mode->hsync_start; in tilcdc_crtc_mode_fixup()
756 hfp = mode->hsync_start - mode->hdisplay; in tilcdc_crtc_mode_valid()
757 hsw = mode->hsync_end - mode->hsync_start; in tilcdc_crtc_mode_valid()
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| /drivers/gpu/drm/msm/hdmi/ |
| D | hdmi_bridge.c | 214 hstart = mode->htotal - mode->hsync_start; in msm_hdmi_bridge_mode_set()
215 hend = mode->htotal - mode->hsync_start + mode->hdisplay; in msm_hdmi_bridge_mode_set()
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| /drivers/gpu/drm/sti/ |
| D | sti_vtg.c | 197 stop = mode->hsync_end - mode->hsync_start; in vtg_set_hsync_vsync_pos()
337 return mode.htotal - mode.hsync_start + x; in sti_vtg_get_pixel_number()
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| /drivers/gpu/drm/sun4i/ |
| D | sun6i_mipi_dsi.c | 440 } else if ((mode->hsync_start - mode->hdisplay) > 20) { in sun6i_dsi_setup_burst()
442 u16 drq = (mode->hsync_start - mode->hdisplay) - 20; in sun6i_dsi_setup_burst()
560 (mode->hsync_end - mode->hsync_start) * Bpp - HSA_PACKET_OVERHEAD); in sun6i_dsi_setup_timings()
578 (mode->hsync_start - mode->hdisplay) * Bpp - HFP_PACKET_OVERHEAD); in sun6i_dsi_setup_timings()
587 (mode->htotal - (mode->hsync_end - mode->hsync_start)) * Bpp - in sun6i_dsi_setup_timings()
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| /drivers/gpu/drm/rcar-du/ |
| D | rcar_du_crtc.c | 300 rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - mode->hsync_start - 19); in rcar_du_crtc_set_display_timing()
301 rcar_du_crtc_write(rcrtc, HDER, mode->htotal - mode->hsync_start + in rcar_du_crtc_set_display_timing()
304 mode->hsync_start - 1); in rcar_du_crtc_set_display_timing()
317 rcar_du_crtc_write(rcrtc, DESR, mode->htotal - mode->hsync_start - 1); in rcar_du_crtc_set_display_timing()
784 if (mode->htotal - mode->hsync_start < 20) in rcar_du_crtc_mode_valid()
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