/drivers/gpu/drm/ |
D | drm_hashtab.c | 45 int drm_ht_create(struct drm_open_hash *ht, unsigned int order) in drm_ht_create() argument 49 ht->order = order; in drm_ht_create() 50 ht->table = NULL; in drm_ht_create() 51 if (size <= PAGE_SIZE / sizeof(*ht->table)) in drm_ht_create() 52 ht->table = kcalloc(size, sizeof(*ht->table), GFP_KERNEL); in drm_ht_create() 54 ht->table = vzalloc(array_size(size, sizeof(*ht->table))); in drm_ht_create() 55 if (!ht->table) { in drm_ht_create() 63 void drm_ht_verbose_list(struct drm_open_hash *ht, unsigned long key) in drm_ht_verbose_list() argument 70 hashed_key = hash_long(key, ht->order); in drm_ht_verbose_list() 72 h_list = &ht->table[hashed_key]; in drm_ht_verbose_list() [all …]
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/drivers/net/wireless/mediatek/mt76/ |
D | mt76x02_phy.c | 104 mt76x02_tx_power_mask(t->ofdm[4], t->ofdm[6], t->ht[0], in mt76x02_phy_set_txpower() 105 t->ht[2])); in mt76x02_phy_set_txpower() 107 mt76x02_tx_power_mask(t->ht[4], t->ht[6], t->ht[8], in mt76x02_phy_set_txpower() 108 t->ht[10])); in mt76x02_phy_set_txpower() 110 mt76x02_tx_power_mask(t->ht[12], t->ht[14], t->stbc[0], in mt76x02_phy_set_txpower() 115 mt76x02_tx_power_mask(t->ofdm[7], t->vht[8], t->ht[7], in mt76x02_phy_set_txpower() 118 mt76x02_tx_power_mask(t->ht[14], 0, t->vht[8], t->vht[9])); in mt76x02_phy_set_txpower() 120 mt76x02_tx_power_mask(t->ht[7], 0, t->stbc[8], t->stbc[9])); in mt76x02_phy_set_txpower()
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D | debugfs.c | 71 mt76_seq_puts_array(s, "HT", dev->rate_power.ht, in mt76_read_rate_txpower() 72 ARRAY_SIZE(dev->rate_power.ht)); in mt76_read_rate_txpower()
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D | mt76x02_txrx.c | 72 max_txpwr = dev->mt76.rate_power.ht[idx & 0xf]; in mt76x02_tx_get_max_txpwr_adj() 75 max_txpwr = dev->mt76.rate_power.ht[rate->idx & 0xf]; in mt76x02_tx_get_max_txpwr_adj()
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/drivers/net/wireless/mediatek/mt76/mt76x2/ |
D | eeprom.c | 307 t->ht[0] = t->ht[1] = mt76x02_rate_power_val(val); in mt76x2_get_rate_power() 308 t->ht[2] = t->ht[3] = mt76x02_rate_power_val(val >> 8); in mt76x2_get_rate_power() 311 t->ht[4] = t->ht[5] = mt76x02_rate_power_val(val); in mt76x2_get_rate_power() 312 t->ht[6] = t->ht[7] = mt76x02_rate_power_val(val >> 8); in mt76x2_get_rate_power() 315 t->ht[8] = t->ht[9] = mt76x02_rate_power_val(val); in mt76x2_get_rate_power() 316 t->ht[10] = t->ht[11] = mt76x02_rate_power_val(val >> 8); in mt76x2_get_rate_power() 319 t->ht[12] = t->ht[13] = mt76x02_rate_power_val(val); in mt76x2_get_rate_power() 320 t->ht[14] = t->ht[15] = mt76x02_rate_power_val(val >> 8); in mt76x2_get_rate_power() 335 memcpy(t->stbc, t->ht, sizeof(t->stbc[0]) * 8); in mt76x2_get_rate_power()
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/drivers/gpu/drm/vmwgfx/ |
D | vmwgfx_validation.c | 182 if (ctx->ht) { in vmw_validation_find_bo_dup() 185 if (!drm_ht_find_item(ctx->ht, (unsigned long) vbo, &hash)) in vmw_validation_find_bo_dup() 219 if (ctx->ht) { in vmw_validation_find_res_dup() 222 if (!drm_ht_find_item(ctx->ht, (unsigned long) res, &hash)) in vmw_validation_find_res_dup() 277 if (ctx->ht) { in vmw_validation_add_bo() 279 ret = drm_ht_insert_item(ctx->ht, &bo_node->hash); in vmw_validation_add_bo() 332 if (ctx->ht) { in vmw_validation_add_resource() 334 ret = drm_ht_insert_item(ctx->ht, &node->hash); in vmw_validation_add_resource() 642 if (!ctx->ht) in vmw_validation_drop_ht() 646 (void) drm_ht_remove_item(ctx->ht, &entry->hash); in vmw_validation_drop_ht() [all …]
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D | ttm_object.c | 248 struct drm_open_hash *ht = &tfile->ref_hash[TTM_REF_USAGE]; in ttm_base_object_noref_lookup() local 252 ret = drm_ht_find_item_rcu(ht, key, &hash); in ttm_base_object_noref_lookup() 268 struct drm_open_hash *ht = &tfile->ref_hash[TTM_REF_USAGE]; in ttm_base_object_lookup() local 272 ret = drm_ht_find_item_rcu(ht, key, &hash); in ttm_base_object_lookup() 312 struct drm_open_hash *ht = &tfile->ref_hash[TTM_REF_USAGE]; in ttm_ref_object_exists() local 317 if (unlikely(drm_ht_find_item_rcu(ht, base->handle, &hash) != 0)) in ttm_ref_object_exists() 349 struct drm_open_hash *ht = &tfile->ref_hash[ref_type]; in ttm_ref_object_add() local 367 ret = drm_ht_find_item_rcu(ht, base->handle, &hash); in ttm_ref_object_add() 398 ret = drm_ht_insert_item_rcu(ht, &ref->hash); in ttm_ref_object_add() 426 struct drm_open_hash *ht; in ttm_ref_object_release() local [all …]
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D | vmwgfx_validation.h | 76 struct drm_open_hash *ht; member 108 { .ht = _ht, \ 154 struct drm_open_hash *ht) in vmw_validation_set_ht() argument 156 ctx->ht = ht; in vmw_validation_set_ht()
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/drivers/md/ |
D | dm-cache-policy-smq.c | 583 static int h_init(struct smq_hash_table *ht, struct entry_space *es, unsigned nr_entries) in h_init() argument 587 ht->es = es; in h_init() 589 ht->hash_bits = __ffs(nr_buckets); in h_init() 591 ht->buckets = vmalloc(array_size(nr_buckets, sizeof(*ht->buckets))); in h_init() 592 if (!ht->buckets) in h_init() 596 ht->buckets[i] = INDEXER_NULL; in h_init() 601 static void h_exit(struct smq_hash_table *ht) in h_exit() argument 603 vfree(ht->buckets); in h_exit() 606 static struct entry *h_head(struct smq_hash_table *ht, unsigned bucket) in h_head() argument 608 return to_entry(ht->es, ht->buckets[bucket]); in h_head() [all …]
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/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ |
D | ipoib_vlan.c | 88 struct mlx5i_pkey_qpn_ht *ht = ipriv->qpn_htbl; in mlx5i_pkey_add_qpn() local 98 spin_lock_bh(&ht->ht_lock); in mlx5i_pkey_add_qpn() 99 hlist_add_head(&new_node->hlist, &ht->buckets[key]); in mlx5i_pkey_add_qpn() 100 spin_unlock_bh(&ht->ht_lock); in mlx5i_pkey_add_qpn() 109 struct mlx5i_pkey_qpn_ht *ht = ipriv->qpn_htbl; in mlx5i_pkey_del_qpn() local 112 node = mlx5i_find_qpn_to_netdev_node(ht->buckets, qpn); in mlx5i_pkey_del_qpn() 118 spin_lock_bh(&ht->ht_lock); in mlx5i_pkey_del_qpn() 120 spin_unlock_bh(&ht->ht_lock); in mlx5i_pkey_del_qpn()
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/drivers/net/wireless/mediatek/mt76/mt76x0/ |
D | eeprom.c | 182 t->ht[0] = t->ht[1] = t->vht[0] = t->vht[1] = s6_to_s8(val); in mt76x0_get_tx_power_per_rate() 183 t->ht[2] = t->ht[3] = t->vht[2] = t->vht[3] = s6_to_s8(val >> 8); in mt76x0_get_tx_power_per_rate() 188 t->ht[4] = t->ht[5] = t->vht[4] = t->vht[5] = s6_to_s8(val); in mt76x0_get_tx_power_per_rate() 189 t->ht[6] = t->ht[7] = t->vht[6] = t->vht[7] = s6_to_s8(val >> 8); in mt76x0_get_tx_power_per_rate()
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/drivers/net/wireless/intel/iwlwifi/dvm/ |
D | rxon.c | 171 if (ctx->ht.enabled) in iwlagn_update_qos() 608 if (!ctx->ht.enabled) { in _iwl_set_rxon_ht() 619 rxon->flags |= cpu_to_le32(ctx->ht.protection << in _iwl_set_rxon_ht() 629 if (ctx->ht.protection == in _iwl_set_rxon_ht() 636 switch (ctx->ht.extension_chan_offset) { in _iwl_set_rxon_ht() 651 switch (ctx->ht.extension_chan_offset) { in _iwl_set_rxon_ht() 680 le32_to_cpu(rxon->flags), ctx->ht.protection, in _iwl_set_rxon_ht() 681 ctx->ht.extension_chan_offset); in _iwl_set_rxon_ht() 1143 ctx->ht.extension_chan_offset = in iwlagn_config_ht40() 1145 ctx->ht.is_40mhz = true; in iwlagn_config_ht40() [all …]
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/drivers/video/fbdev/matrox/ |
D | matroxfb_misc.c | 192 unsigned int hd, hs, he, hbe, ht; in matroxfb_vgaHWinit() local 243 ht = m->HTotal >> 3; in matroxfb_vgaHWinit() 252 ht >>= 1; in matroxfb_vgaHWinit() 261 ht <<= 1; in matroxfb_vgaHWinit() 267 ht = ht - 1; in matroxfb_vgaHWinit() 274 if (((ht & 0x07) == 0x06) || ((ht & 0x0F) == 0x04)) in matroxfb_vgaHWinit() 275 ht++; in matroxfb_vgaHWinit() 276 hbe = ht; in matroxfb_vgaHWinit() 283 hw->CRTCEXT[5] = (hs + he - ht) >> 1; in matroxfb_vgaHWinit() 289 hw->CRTCEXT[1] = (((ht - 4) & 0x100) >> 8) | in matroxfb_vgaHWinit() [all …]
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/drivers/net/wireless/ralink/rt2x00/ |
D | rt2x00queue.c | 305 txdesc->u.ht.wcid = sta_priv->wcid; in rt2x00queue_create_tx_descriptor_ht() 314 txdesc->u.ht.mcs = txrate->idx; in rt2x00queue_create_tx_descriptor_ht() 320 if (sta && txdesc->u.ht.mcs > 7 && in rt2x00queue_create_tx_descriptor_ht() 324 txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs); in rt2x00queue_create_tx_descriptor_ht() 326 txdesc->u.ht.mcs |= 0x08; in rt2x00queue_create_tx_descriptor_ht() 331 txdesc->u.ht.txop = TXOP_SIFS; in rt2x00queue_create_tx_descriptor_ht() 333 txdesc->u.ht.txop = TXOP_BACKOFF; in rt2x00queue_create_tx_descriptor_ht() 343 txdesc->u.ht.stbc = 1; in rt2x00queue_create_tx_descriptor_ht() 352 txdesc->u.ht.mpdu_density = density; in rt2x00queue_create_tx_descriptor_ht() 353 txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */ in rt2x00queue_create_tx_descriptor_ht() [all …]
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/drivers/staging/speakup/ |
D | main.c | 1556 speakup_console[vc->vc_num]->ht.cy = vc->vc_y; in do_handle_cursor() 1572 hi = speakup_console[vc_num]->ht.highsize[bi]; in update_color_buffer() 1575 if (speakup_console[vc_num]->ht.highsize[bi] == 0) { in update_color_buffer() 1576 speakup_console[vc_num]->ht.rpos[bi] = vc->vc_pos; in update_color_buffer() 1577 speakup_console[vc_num]->ht.rx[bi] = vc->vc_x; in update_color_buffer() 1578 speakup_console[vc_num]->ht.ry[bi] = vc->vc_y; in update_color_buffer() 1582 speakup_console[vc_num]->ht.highbuf[bi][hi] = ic[i]; in update_color_buffer() 1585 if (speakup_console[vc_num]->ht.highbuf[bi][hi - 1] != in update_color_buffer() 1587 speakup_console[vc_num]->ht.highbuf[bi][hi] = in update_color_buffer() 1594 speakup_console[vc_num]->ht.highsize[bi] = hi; in update_color_buffer() [all …]
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/drivers/clk/pxa/ |
D | clk-pxa27x.c | 227 unsigned int t, ht; in clk_pxa27x_cpll_get_rate() local 233 ht = clkcfg & (1 << 2); in clk_pxa27x_cpll_get_rate() 324 unsigned int t, ht, osc_forced; in clk_pxa27x_core_get_parent() local 333 ht = clkcfg & (1 << 2); in clk_pxa27x_core_get_parent() 335 if (ht || t) in clk_pxa27x_core_get_parent()
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/drivers/net/wireless/intel/iwlegacy/ |
D | 4965-debug.c | 56 struct stats_rx_ht_phy *ht, *accum_ht, *delta_ht, *max_ht; in il4965_ucode_rx_stats_read() local 75 ht = &il->_4965.stats.rx.ofdm_ht; in il4965_ucode_rx_stats_read() 407 le32_to_cpu(ht->plcp_err), accum_ht->plcp_err, in il4965_ucode_rx_stats_read() 411 le32_to_cpu(ht->overrun_err), accum_ht->overrun_err, in il4965_ucode_rx_stats_read() 415 le32_to_cpu(ht->early_overrun_err), in il4965_ucode_rx_stats_read() 420 le32_to_cpu(ht->crc32_good), accum_ht->crc32_good, in il4965_ucode_rx_stats_read() 424 le32_to_cpu(ht->crc32_err), accum_ht->crc32_err, in il4965_ucode_rx_stats_read() 428 le32_to_cpu(ht->mh_format_err), accum_ht->mh_format_err, in il4965_ucode_rx_stats_read() 432 le32_to_cpu(ht->agg_crc32_good), accum_ht->agg_crc32_good, in il4965_ucode_rx_stats_read() 436 le32_to_cpu(ht->agg_mpdu_cnt), accum_ht->agg_mpdu_cnt, in il4965_ucode_rx_stats_read() [all …]
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D | common.c | 2375 if (il->ht.enabled) in il_is_lq_table_valid() 3576 if (!il->ht.enabled || !il->ht.is_40mhz) in il_is_ht40_tx_allowed() 3593 il->ht.extension_chan_offset); in il_is_ht40_tx_allowed() 3847 if (!il->ht.enabled) { in _il_set_rxon_ht() 3856 cpu_to_le32(il->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS); in _il_set_rxon_ht() 3865 if (il->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) { in _il_set_rxon_ht() 3868 switch (il->ht.extension_chan_offset) { in _il_set_rxon_ht() 3879 switch (il->ht.extension_chan_offset) { in _il_set_rxon_ht() 3905 il->ht.protection, il->ht.extension_chan_offset); in _il_set_rxon_ht() 5004 if (il->ht.enabled) in il_update_qos() [all …]
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/drivers/video/fbdev/ |
D | asiliantfb.c | 179 unsigned ht = (p->var.left_margin + p->var.xres + p->var.right_margin + p->var.hsync_len) / 8; in asiliant_set_timing() local 193 write_cr(0x00, (ht - 5) & 0xff); in asiliant_set_timing() 196 write_cr(0x03, ((ht - 1) & 0x1f) | 0x80); in asiliant_set_timing() 198 write_cr(0x05, (((ht - 1) & 0x20) <<2) | (he & 0x1f)); in asiliant_set_timing() 199 write_cr(0x3c, (ht - 1) & 0xc0); in asiliant_set_timing() 214 write_cr(0x38, ((ht - 5) & 0x100) >> 8); in asiliant_set_timing()
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/drivers/net/wireless/broadcom/b43/ |
D | phy_ht.c | 198 struct b43_phy_ht *htphy = dev->phy.ht; in b43_phy_ht_pa_override() 337 struct b43_phy_ht *phy_ht = dev->phy.ht; in b43_phy_ht_stop_playback() 377 struct b43_phy_ht *phy_ht = dev->phy.ht; in b43_phy_ht_run_samples() 535 struct b43_phy_ht *phy_ht = dev->phy.ht; in b43_phy_ht_tx_power_ctl() 575 struct b43_phy_ht *phy_ht = dev->phy.ht; in b43_phy_ht_tx_power_ctl_idle_tssi() 623 struct b43_phy_ht *phy_ht = dev->phy.ht; in b43_phy_ht_tx_power_ctl_setup() 848 dev->phy.ht = phy_ht; in b43_phy_ht_op_allocate() 856 struct b43_phy_ht *phy_ht = phy->ht; in b43_phy_ht_op_prepare_structs() 871 struct b43_phy_ht *phy_ht = dev->phy.ht; in b43_phy_ht_op_init() 1015 struct b43_phy_ht *phy_ht = phy->ht; in b43_phy_ht_op_free() [all …]
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/drivers/net/wireless/mediatek/mt7601u/ |
D | debugfs.c | 114 rp->ht[i].raw, rp->ht[i].bw20, rp->ht[i].bw40); in mt7601u_eeprom_param_read()
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D | eeprom.c | 281 mt7601u_set_power_rate(&t->ht[0], delta, (val >> 16) & 0xff); in mt7601u_save_power_rate() 282 mt7601u_set_power_rate(&t->ht[1], delta, (val >> 24) & 0xff); in mt7601u_save_power_rate() 285 mt7601u_set_power_rate(&t->ht[2], delta, (val >> 0) & 0xff); in mt7601u_save_power_rate() 286 mt7601u_set_power_rate(&t->ht[3], delta, (val >> 8) & 0xff); in mt7601u_save_power_rate()
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/drivers/net/wireless/intel/iwlwifi/mvm/ |
D | debugfs.c | 927 struct mvm_statistics_rx_ht_phy_v1 *ht = in iwl_dbgfs_fw_rx_stats_read() local 930 PRINT_STATS_LE32(ht, plcp_err); in iwl_dbgfs_fw_rx_stats_read() 931 PRINT_STATS_LE32(ht, overrun_err); in iwl_dbgfs_fw_rx_stats_read() 932 PRINT_STATS_LE32(ht, early_overrun_err); in iwl_dbgfs_fw_rx_stats_read() 933 PRINT_STATS_LE32(ht, crc32_good); in iwl_dbgfs_fw_rx_stats_read() 934 PRINT_STATS_LE32(ht, crc32_err); in iwl_dbgfs_fw_rx_stats_read() 935 PRINT_STATS_LE32(ht, mh_format_err); in iwl_dbgfs_fw_rx_stats_read() 936 PRINT_STATS_LE32(ht, agg_crc32_good); in iwl_dbgfs_fw_rx_stats_read() 937 PRINT_STATS_LE32(ht, agg_mpdu_cnt); in iwl_dbgfs_fw_rx_stats_read() 938 PRINT_STATS_LE32(ht, agg_cnt); in iwl_dbgfs_fw_rx_stats_read() [all …]
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/drivers/net/wireless/ti/wl18xx/ |
D | main.c | 426 .ht = { 509 .ht = { 1263 (priv->conf.ht.mode != HT_MODE_WIDE) && in wl18xx_is_mimo_supported() 1264 (priv->conf.ht.mode != HT_MODE_SISO20); in wl18xx_is_mimo_supported() 1949 priv->conf.ht.mode = HT_MODE_DEFAULT; in wl18xx_setup() 1951 priv->conf.ht.mode = HT_MODE_WIDE; in wl18xx_setup() 1953 priv->conf.ht.mode = HT_MODE_SISO20; in wl18xx_setup() 1960 if (priv->conf.ht.mode == HT_MODE_DEFAULT) { in wl18xx_setup() 1975 } else if (priv->conf.ht.mode == HT_MODE_WIDE) { in wl18xx_setup() 1980 } else if (priv->conf.ht.mode == HT_MODE_SISO20) { in wl18xx_setup()
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/drivers/gpu/drm/i2c/ |
D | ch7006_mode.c | 105 #define __MODE(f, hd, vd, ht, vt, hsynp, vsynp, \ argument 115 .htotal = ht, \ 135 #define MODE(f, hd, vd, ht, vt, hsynp, vsynp, \ argument 137 __MODE(f, hd, vd, ht, vt, hsynp, vsynp, subc, scale, \
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