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Searched refs:lli (Results 1 – 25 of 25) sorted by relevance

/drivers/scsi/cxlflash/
Dlunmgt.c35 struct llun_info *lli = NULL; in create_local() local
37 lli = kzalloc(sizeof(*lli), GFP_KERNEL); in create_local()
38 if (unlikely(!lli)) { in create_local()
43 lli->sdev = sdev; in create_local()
44 lli->host_no = sdev->host->host_no; in create_local()
45 lli->in_table = false; in create_local()
47 memcpy(lli->wwid, wwid, DK_CXLFLASH_MANAGE_LUN_WWID_LEN); in create_local()
49 return lli; in create_local()
86 struct llun_info *lli, *temp; in lookup_local() local
88 list_for_each_entry_safe(lli, temp, &cfg->lluns, list) in lookup_local()
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Dvlun.c368 static int init_vlun(struct llun_info *lli) in init_vlun() argument
371 struct glun_info *gli = lli->parent; in init_vlun()
378 blka->ba_lun.lun_id = lli->lun_index; in init_vlun()
389 pr_debug("%s: returning rc=%d lli=%p\n", __func__, rc, lli); in init_vlun()
510 struct llun_info *lli = sdev->hostdata; in grow_lxt() local
511 struct glun_info *gli = lli->parent; in grow_lxt()
575 (lli->lun_index << LXT_LUNIDX_SHIFT) | in grow_lxt()
577 lli->port_sel)); in grow_lxt()
628 struct llun_info *lli = sdev->hostdata; in shrink_lxt() local
629 struct glun_info *gli = lli->parent; in shrink_lxt()
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Dsuperpipe.c162 struct llun_info *lli = arg; in get_context() local
168 lli = NULL; in get_context()
218 if (lli) { in get_context()
220 if (lun_access->lli == lli) in get_context()
330 static int read_cap16(struct scsi_device *sdev, struct llun_info *lli) in read_cap16() argument
334 struct glun_info *gli = lli->parent; in read_cap16()
437 struct llun_info *lli) in get_rhte() argument
455 if (unlikely(ctxi->rht_lun[rhndl] != lli)) { in get_rhte()
481 struct llun_info *lli) in rhte_checkout() argument
497 ctxi->rht_lun[i] = lli; in rhte_checkout()
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Dsuperpipe.h69 struct llun_info *lli; member
140 struct llun_info *lli);
143 struct llun_info *lli);
/drivers/dma/
Dcoh901318_lli.c59 struct coh901318_lli *lli; in coh901318_lli_alloc() local
75 lli = head; in coh901318_lli_alloc()
76 lli->phy_this = phy; in coh901318_lli_alloc()
77 lli->link_addr = 0x00000000; in coh901318_lli_alloc()
78 lli->virt_link_addr = NULL; in coh901318_lli_alloc()
81 lli_prev = lli; in coh901318_lli_alloc()
83 lli = dma_pool_alloc(pool->dmapool, GFP_NOWAIT, &phy); in coh901318_lli_alloc()
85 if (lli == NULL) in coh901318_lli_alloc()
89 lli->phy_this = phy; in coh901318_lli_alloc()
90 lli->link_addr = 0x00000000; in coh901318_lli_alloc()
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Dste_dma40_ll.c132 static int d40_phy_fill_lli(struct d40_phy_lli *lli, in d40_phy_fill_lli() argument
160 lli->reg_elt = (data_size / data_width) << D40_SREG_ELEM_PHY_ECNT_POS; in d40_phy_fill_lli()
167 lli->reg_elt |= data_width << D40_SREG_ELEM_PHY_EIDX_POS; in d40_phy_fill_lli()
170 lli->reg_ptr = data; in d40_phy_fill_lli()
171 lli->reg_cfg = reg_cfg; in d40_phy_fill_lli()
175 lli->reg_lnk = BIT(D40_SREG_LNK_PHY_TCP_POS); in d40_phy_fill_lli()
177 lli->reg_lnk = next_lli; in d40_phy_fill_lli()
181 lli->reg_cfg |= BIT(D40_SREG_CFG_TIM_POS); in d40_phy_fill_lli()
183 lli->reg_cfg &= ~BIT(D40_SREG_CFG_TIM_POS); in d40_phy_fill_lli()
212 d40_phy_buf_to_lli(struct d40_phy_lli *lli, dma_addr_t addr, u32 size, in d40_phy_buf_to_lli() argument
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Dowl-dma.c324 struct owl_dma_lli *lli) in owl_dma_free_lli() argument
326 list_del(&lli->node); in owl_dma_free_lli()
327 dma_pool_free(od->lli_pool, lli, lli->phys); in owl_dma_free_lli()
332 struct owl_dma_lli *lli; in owl_dma_alloc_lli() local
335 lli = dma_pool_alloc(od->lli_pool, GFP_NOWAIT, &phys); in owl_dma_alloc_lli()
336 if (!lli) in owl_dma_alloc_lli()
339 INIT_LIST_HEAD(&lli->node); in owl_dma_alloc_lli()
340 lli->phys = phys; in owl_dma_alloc_lli()
342 return lli; in owl_dma_alloc_lli()
362 struct owl_dma_lli *lli, in owl_dma_cfg_lli() argument
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Dat_hdmac_regs.h186 struct at_lli lli; member
381 static void atc_dump_lli(struct at_dma_chan *atchan, struct at_lli *lli) in atc_dump_lli() argument
385 &lli->saddr, &lli->daddr, in atc_dump_lli()
386 lli->ctrla, lli->ctrlb, &lli->dscr); in atc_dump_lli()
449 u32 ctrlb = desc->lli.ctrlb; in set_desc_eol()
454 desc->lli.ctrlb = ctrlb; in set_desc_eol()
455 desc->lli.dscr = 0; in set_desc_eol()
Dcoh901318.c1273 struct coh901318_lli *lli; member
1317 struct coh901318_lli *lli) in coh901318_list_print() argument
1319 struct coh901318_lli *l = lli; in coh901318_list_print()
1486 struct coh901318_lli *lli) in coh901318_prep_linked_list() argument
1495 writel(lli->src_addr, in coh901318_prep_linked_list()
1499 writel(lli->dst_addr, virtbase + in coh901318_prep_linked_list()
1503 writel(lli->link_addr, virtbase + COH901318_CX_LNK_ADDR + in coh901318_prep_linked_list()
1506 writel(lli->control, virtbase + COH901318_CX_CTRL + in coh901318_prep_linked_list()
1585 struct coh901318_lli *lli = in_lli; in coh901318_get_bytes_in_lli() local
1588 while (lli) { in coh901318_get_bytes_in_lli()
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Dat_hdmac.c203 (*prev)->lli.dscr = desc->txd.phys; in atc_desc_chain()
325 if (desc_first->lli.dscr) { in atc_get_bytes_left()
409 if (desc_first->lli.dscr == dscr) in atc_get_bytes_left()
414 if (desc->lli.dscr == dscr) in atc_get_bytes_left()
572 atc_dump_lli(atchan, &bad_desc->lli); in atc_handle_error()
574 atc_dump_lli(atchan, &child->lli); in atc_handle_error()
772 desc->lli.saddr = xt->src_start; in atc_prep_dma_interleaved()
773 desc->lli.daddr = xt->dst_start; in atc_prep_dma_interleaved()
774 desc->lli.ctrla = ctrla | xfer_count; in atc_prep_dma_interleaved()
775 desc->lli.ctrlb = ctrlb; in atc_prep_dma_interleaved()
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Dcoh901318.h81 struct coh901318_lli **lli);
96 struct coh901318_lli *lli,
114 struct coh901318_lli *lli,
135 struct coh901318_lli *lli,
Didma64.c214 dma_pool_free(idma64c->pool, hw->lli, hw->llp); in idma64_desc_free()
233 struct idma64_lli *lli = hw->lli; in idma64_hw_desc_fill() local
255 lli->sar = sar; in idma64_hw_desc_fill()
256 lli->dar = dar; in idma64_hw_desc_fill()
258 lli->ctlhi = ctlhi; in idma64_hw_desc_fill()
259 lli->ctllo = ctllo | in idma64_hw_desc_fill()
265 lli->llp = llp; in idma64_hw_desc_fill()
274 struct idma64_lli *lli = hw->lli; in idma64_desc_fill() local
286 lli->ctllo |= IDMA64C_CTLL_INT_EN; in idma64_desc_fill()
289 lli->ctllo &= ~(IDMA64C_CTLL_LLP_S_EN | IDMA64C_CTLL_LLP_D_EN); in idma64_desc_fill()
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Dsun6i-dma.c344 struct sun6i_dma_lli *lli; in sun6i_get_chan_size() local
354 for (lli = txd->v_lli; lli; lli = lli->v_lli_next) { in sun6i_get_chan_size()
355 if (lli->p_lli_next == pos) { in sun6i_get_chan_size()
356 for (lli = lli->v_lli_next; lli; lli = lli->v_lli_next) in sun6i_get_chan_size()
357 bytes += lli->len; in sun6i_get_chan_size()
388 struct sun6i_dma_lli *lli) in sun6i_dma_dump_lli() argument
390 phys_addr_t p_lli = virt_to_phys(lli); in sun6i_dma_dump_lli()
396 &p_lli, lli, in sun6i_dma_dump_lli()
397 lli->cfg, lli->src, lli->dst, in sun6i_dma_dump_lli()
398 lli->len, lli->para, lli->p_lli_next); in sun6i_dma_dump_lli()
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Damba-pl08x.c392 struct pl08x_phy_chan *phychan, const u32 *lli, u32 ccfg) in pl08x_write_lli() argument
398 phychan->id, lli[PL080_LLI_SRC], lli[PL080_LLI_DST], in pl08x_write_lli()
399 lli[PL080_LLI_LLI], lli[PL080_LLI_CCTL], in pl08x_write_lli()
400 lli[PL080S_LLI_CCTL2], ccfg); in pl08x_write_lli()
405 phychan->id, lli[PL080_LLI_SRC], lli[PL080_LLI_DST], in pl08x_write_lli()
406 lli[PL080_LLI_LLI], lli[PL080_LLI_CCTL], ccfg); in pl08x_write_lli()
408 writel_relaxed(lli[PL080_LLI_SRC], phychan->reg_src); in pl08x_write_lli()
409 writel_relaxed(lli[PL080_LLI_DST], phychan->reg_dst); in pl08x_write_lli()
410 writel_relaxed(lli[PL080_LLI_LLI], phychan->reg_lli); in pl08x_write_lli()
419 u32 llictl = lli[PL080_LLI_CCTL]; in pl08x_write_lli()
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Dk3dma.c62 u32 lli; member
164 writel_relaxed(hw->lli, phy->base + CX_LLI); in k3_dma_set_desc()
414 if (!ds->desc_hw[index].lli) in k3_dma_tx_status()
452 ds->desc_hw[num].lli = ds->desc_hw_lli + (num + 1) * in k3_dma_fill_desc()
455 ds->desc_hw[num].lli |= CX_LLI_CHAIN_EN; in k3_dma_fill_desc()
528 ds->desc_hw[num-1].lli = 0; /* end of link */ in k3_dma_prep_memcpy()
583 ds->desc_hw[num-1].lli = 0; /* end of link */ in k3_dma_prep_slave_sg()
649 ds->desc_hw[num - 1].lli |= ds->desc_hw_lli; in k3_dma_prep_dma_cyclic()
Dzx_dma.c82 u32 lli; member
162 writel_relaxed(hw->lli, phy->base + REG_ZX_LLI_ADDR); in zx_dma_set_desc()
370 if (!ds->desc_hw[index].lli) in zx_dma_tx_status()
410 ds->desc_hw[num].lli = ds->desc_hw_lli + (num + 1) * in zx_dma_fill_desc()
540 ds->desc_hw[num - 1].lli = 0; /* end of link */ in zx_dma_prep_memcpy()
597 ds->desc_hw[num - 1].lli = 0; /* end of link */ in zx_dma_prep_slave_sg()
641 ds->desc_hw[num - 1].lli = ds->desc_hw_lli; in zx_dma_prep_dma_cyclic()
Didma64.h107 struct idma64_lli *lli; member
Dste_dma40_ll.h444 struct d40_phy_lli *lli,
Dste_dma40.c831 struct d40_log_lli_bidir *lli = &desc->lli_log; in d40_log_lli_to_lcxa() local
877 &lli->dst[lli_current], in d40_log_lli_to_lcxa()
878 &lli->src[lli_current], in d40_log_lli_to_lcxa()
905 &lli->dst[lli_current], in d40_log_lli_to_lcxa()
906 &lli->src[lli_current], in d40_log_lli_to_lcxa()
915 &lli->dst[lli_current], in d40_log_lli_to_lcxa()
916 &lli->src[lli_current], in d40_log_lli_to_lcxa()
/drivers/dma/dw-edma/
Ddw-edma-v0-core.c195 struct dw_edma_v0_lli __iomem *lli; in dw_edma_v0_core_write_chunk() local
200 lli = chunk->ll_region.vaddr; in dw_edma_v0_core_write_chunk()
212 SET_LL(&lli[i].control, control); in dw_edma_v0_core_write_chunk()
214 SET_LL(&lli[i].transfer_size, child->sz); in dw_edma_v0_core_write_chunk()
216 SET_LL(&lli[i].sar_low, lower_32_bits(child->sar)); in dw_edma_v0_core_write_chunk()
217 SET_LL(&lli[i].sar_high, upper_32_bits(child->sar)); in dw_edma_v0_core_write_chunk()
219 SET_LL(&lli[i].dar_low, lower_32_bits(child->dar)); in dw_edma_v0_core_write_chunk()
220 SET_LL(&lli[i].dar_high, upper_32_bits(child->dar)); in dw_edma_v0_core_write_chunk()
224 llp = (void __iomem *)&lli[i]; in dw_edma_v0_core_write_chunk()
/drivers/dma/dw-axi-dmac/
Ddw-axi-dmac-platform.c263 desc->lli.llp = cpu_to_le64(adr); in write_desc_llp()
385 val = le32_to_cpu(desc->lli.ctl_hi); in set_desc_last()
387 desc->lli.ctl_hi = cpu_to_le32(val); in set_desc_last()
392 desc->lli.sar = cpu_to_le64(adr); in write_desc_sar()
397 desc->lli.dar = cpu_to_le64(adr); in write_desc_dar()
405 val = le32_to_cpu(desc->lli.ctl_lo); in set_desc_src_master()
407 desc->lli.ctl_lo = cpu_to_le32(val); in set_desc_src_master()
415 val = le32_to_cpu(desc->lli.ctl_lo); in set_desc_dest_master()
421 desc->lli.ctl_lo = cpu_to_le32(val); in set_desc_dest_master()
466 desc->lli.block_ts_lo = cpu_to_le32(block_ts - 1); in dma_chan_prep_dma_memcpy()
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Ddw-axi-dmac.h84 struct axi_dma_lli lli; member
/drivers/dma/dw/
Dregs.h384 struct dw_lli lli; member
386 #define lli_set(d, reg, v) ((d)->lli.reg |= cpu_to_le32(v))
387 #define lli_clear(d, reg, v) ((d)->lli.reg &= ~cpu_to_le32(v))
388 #define lli_read(d, reg) le32_to_cpu((d)->lli.reg)
389 #define lli_write(d, reg, v) ((d)->lli.reg = cpu_to_le32(v))
Dcore.c609 prev->lli.llp = 0; in dwc_prep_dma_memcpy()
759 prev->lli.llp = 0; in dwc_prep_slave_sg()
/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_uld.c568 struct cxgb4_lld_info *lli) in uld_queue_init() argument
574 lli->rxq_ids = rxq_info->rspq_id; in uld_queue_init()
575 lli->nrxq = rxq_info->nrxq; in uld_queue_init()
576 lli->ciq_ids = rxq_info->rspq_id + rxq_info->nrxq; in uld_queue_init()
577 lli->nciq = rxq_info->nciq; in uld_queue_init()
578 lli->ntxq = txq_info->ntxq; in uld_queue_init()
700 struct cxgb4_lld_info lli; in uld_attach() local
703 uld_init(adap, &lli); in uld_attach()
704 uld_queue_init(adap, uld, &lli); in uld_attach()
706 handle = adap->uld[uld].add(&lli); in uld_attach()