Searched refs:mask3 (Results 1 – 5 of 5) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/ |
| D | dc_helper.c | 164 uint8_t shift3, uint32_t mask3, uint32_t *field_value3) in generic_reg_get3() argument
169 *field_value3 = get_reg_field_value_ex(reg_val, mask3, shift3); in generic_reg_get3()
176 uint8_t shift3, uint32_t mask3, uint32_t *field_value3, in generic_reg_get4() argument
182 *field_value3 = get_reg_field_value_ex(reg_val, mask3, shift3); in generic_reg_get4()
190 uint8_t shift3, uint32_t mask3, uint32_t *field_value3, in generic_reg_get5() argument
197 *field_value3 = get_reg_field_value_ex(reg_val, mask3, shift3); in generic_reg_get5()
206 uint8_t shift3, uint32_t mask3, uint32_t *field_value3, in generic_reg_get6() argument
214 *field_value3 = get_reg_field_value_ex(reg_val, mask3, shift3); in generic_reg_get6()
224 uint8_t shift3, uint32_t mask3, uint32_t *field_value3, in generic_reg_get7() argument
233 *field_value3 = get_reg_field_value_ex(reg_val, mask3, shift3); in generic_reg_get7()
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| /drivers/net/hamradio/ |
| D | hdlcdrv.c | 158 unsigned int mask1, mask2, mask3, mask4, mask5, mask6, word; in hdlcdrv_receiver() local
176 for(i = 15, mask1 = 0x1fc00, mask2 = 0x1fe00, mask3 = 0x0fc00, in hdlcdrv_receiver()
179 i--, mask1 <<= 1, mask2 <<= 1, mask3 <<= 1, mask4 <<= 1, in hdlcdrv_receiver()
183 else if ((s->hdlcrx.bitstream & mask2) == mask3) { in hdlcdrv_receiver()
254 unsigned int mask1, mask2, mask3; in hdlcdrv_transmitter() local
331 mask3 = 0xffffffff >> (31-s->hdlctx.numbits); in hdlcdrv_transmitter()
334 mask3 = (mask3 << 1) | 1) { in hdlcdrv_transmitter()
339 (s->hdlctx.bitbuf & mask3) | in hdlcdrv_transmitter()
341 (~mask3)) << 1); in hdlcdrv_transmitter()
343 mask3 = (mask3 << 1) | 1; in hdlcdrv_transmitter()
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| D | reg_helper.h | 401 uint8_t shift3, uint32_t mask3, uint32_t *field_value3);
406 uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
412 uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
419 uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
427 uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
436 uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
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| /drivers/clk/bcm/ |
| D | clk-bcm2835.c | 441 u32 mask3; member
451 .mask3 = A2W_PLL_KA_MASK,
461 .mask3 = 0,
691 ana[3] &= ~data->ana->mask3; in bcm2835_pll_set_rate()
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| /drivers/power/supply/ |
| D | rt9455_charger.c | 1060 unsigned int irq3, mask3; in rt9455_irq_handler_check_irq3_register() local
1071 ret = regmap_read(info->regmap, RT9455_REG_MASK3, &mask3); in rt9455_irq_handler_check_irq3_register()
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