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Searched refs:mask5 (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/display/dc/
Ddc_helper.c192 uint8_t shift5, uint32_t mask5, uint32_t *field_value5) in generic_reg_get5() argument
199 *field_value5 = get_reg_field_value_ex(reg_val, mask5, shift5); in generic_reg_get5()
208 uint8_t shift5, uint32_t mask5, uint32_t *field_value5, in generic_reg_get6() argument
216 *field_value5 = get_reg_field_value_ex(reg_val, mask5, shift5); in generic_reg_get6()
226 uint8_t shift5, uint32_t mask5, uint32_t *field_value5, in generic_reg_get7() argument
235 *field_value5 = get_reg_field_value_ex(reg_val, mask5, shift5); in generic_reg_get7()
246 uint8_t shift5, uint32_t mask5, uint32_t *field_value5, in generic_reg_get8() argument
256 *field_value5 = get_reg_field_value_ex(reg_val, mask5, shift5); in generic_reg_get8()
/drivers/net/hamradio/
Dhdlcdrv.c158 unsigned int mask1, mask2, mask3, mask4, mask5, mask6, word; in hdlcdrv_receiver() local
177 mask4 = 0x1f800, mask5 = 0xf800, mask6 = 0xffff; in hdlcdrv_receiver()
180 mask5 <<= 1, mask6 = (mask6 << 1) | 1) { in hdlcdrv_receiver()
196 } else if ((s->hdlcrx.bitstream & mask4) == mask5) { in hdlcdrv_receiver()
/drivers/gpu/drm/amd/display/dc/inc/
Dreg_helper.h414 uint8_t shift5, uint32_t mask5, uint32_t *field_value5);
421 uint8_t shift5, uint32_t mask5, uint32_t *field_value5,
429 uint8_t shift5, uint32_t mask5, uint32_t *field_value5,
438 uint8_t shift5, uint32_t mask5, uint32_t *field_value5,