Searched refs:mcfg (Results 1 – 4 of 4) sorted by relevance
337 u32 addr_offset = cdev->mcfg[MRAM_RXF0].off + fgi * RXF0_ELEMENT_SIZE + in m_can_fifo_read()346 u32 addr_offset = cdev->mcfg[MRAM_TXB].off + fpi * TXB_ELEMENT_SIZE + in m_can_fifo_write()360 u32 addr_offset = cdev->mcfg[MRAM_TXE].off + fgi * TXE_ELEMENT_SIZE + in m_can_txe_fifo_read()1100 cdev->mcfg[MRAM_TXB].off); in m_can_chip_config()1104 (cdev->mcfg[MRAM_TXB].num << TXBC_TFQS_SHIFT) | in m_can_chip_config()1105 (cdev->mcfg[MRAM_TXB].off)); in m_can_chip_config()1114 cdev->mcfg[MRAM_TXE].off); in m_can_chip_config()1118 ((cdev->mcfg[MRAM_TXE].num << TXEFC_EFS_SHIFT) in m_can_chip_config()1120 cdev->mcfg[MRAM_TXE].off); in m_can_chip_config()1125 (cdev->mcfg[MRAM_RXF0].num << RXFC_FS_SHIFT) | in m_can_chip_config()[all …]
98 struct mram_cfg mcfg[MRAM_CFG_NUM]; member
242 struct acpi_table_mcfg *mcfg; in pci_mcfg_parse() local252 mcfg = (struct acpi_table_mcfg *)header; in pci_mcfg_parse()253 mptr = (struct acpi_mcfg_allocation *) &mcfg[1]; in pci_mcfg_parse()
837 u64 cap, mcfg; in hpet_alloc() local915 mcfg = readq(&hpet->hpet_config); in hpet_alloc()916 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { in hpet_alloc()918 mcfg |= HPET_ENABLE_CNF_MASK; in hpet_alloc()919 writeq(mcfg, &hpet->hpet_config); in hpet_alloc()