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Searched refs:min_rate (Results 1 – 25 of 53) sorted by relevance

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/drivers/clk/bcm/
Dclk-raspberrypi.c39 unsigned long min_rate; member
153 final_rate = clamp(req->rate, rpi->min_rate, rpi->max_rate); in raspberrypi_pll_determine_rate()
178 u32 min_rate = 0, max_rate = 0; in raspberrypi_register_pllb() local
195 &min_rate); in raspberrypi_register_pllb()
212 if (!min_rate || !max_rate) { in raspberrypi_register_pllb()
214 min_rate, max_rate); in raspberrypi_register_pllb()
219 min_rate, max_rate); in raspberrypi_register_pllb()
221 rpi->min_rate = min_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE; in raspberrypi_register_pllb()
Dclk-bcm2835.c427 unsigned long min_rate; member
561 rate = clamp(rate, data->min_rate, data->max_rate); in bcm2835_pll_round_rate()
1638 .min_rate = 600000000u,
1704 .min_rate = 600000000u,
1766 .min_rate = 600000000u,
1831 .min_rate = 600000000u,
/drivers/clk/imx/
Dclk-pllv3.c174 unsigned long min_rate = parent_rate * 54 / 2; in clk_pllv3_sys_round_rate() local
180 else if (rate < min_rate) in clk_pllv3_sys_round_rate()
181 rate = min_rate; in clk_pllv3_sys_round_rate()
191 unsigned long min_rate = parent_rate * 54 / 2; in clk_pllv3_sys_set_rate() local
195 if (rate < min_rate || rate > max_rate) in clk_pllv3_sys_set_rate()
235 unsigned long min_rate = parent_rate * 27; in clk_pllv3_av_round_rate() local
244 else if (rate < min_rate) in clk_pllv3_av_round_rate()
245 rate = min_rate; in clk_pllv3_av_round_rate()
267 unsigned long min_rate = parent_rate * 27; in clk_pllv3_av_set_rate() local
274 if (rate < min_rate || rate > max_rate) in clk_pllv3_av_set_rate()
Dclk-sccg-pll.c434 req->min_rate = min; in __clk_sccg_pll_determine_rate()
468 uint64_t min = req->min_rate; in clk_sccg_pll_determine_rate()
/drivers/clk/
Dclk.c80 unsigned long min_rate; member
104 unsigned long min_rate; member
621 unsigned long *min_rate, in clk_core_get_boundaries() argument
628 *min_rate = core->min_rate; in clk_core_get_boundaries()
632 *min_rate = max(*min_rate, clk_user->min_rate); in clk_core_get_boundaries()
638 void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate, in clk_hw_set_rate_range() argument
641 hw->core->min_rate = min_rate; in clk_hw_set_rate_range()
1446 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate); in clk_hw_round_rate()
1479 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate); in clk_round_rate()
1957 unsigned long min_rate; in clk_calc_new_rates() local
[all …]
Dclk-scmi.c53 fmin = clk->info->range.min_rate; in scmi_clk_round_rate()
116 clk_hw_set_rate_range(&sclk->hw, sclk->info->range.min_rate, in scmi_clk_ops_init()
Dclk-qoriq.c848 unsigned long min_rate, in create_mux_common() argument
876 if (rate < min_rate) in create_mux_common()
910 unsigned long plat_rate, min_rate; in create_one_cmux() local
946 min_rate = plat_rate; in create_one_cmux()
948 min_rate = plat_rate / 2; in create_one_cmux()
950 return create_mux_common(cg, hwc, &cmux_ops, min_rate, max_rate, in create_one_cmux()
/drivers/clk/sunxi-ng/
Dccu_nm.h32 unsigned int min_rate; member
100 .min_rate = _min_rate, \
128 .min_rate = _min_rate, \
Dccu_nm.c129 if (rate < nm->min_rate) { in ccu_nm_round_rate()
130 rate = nm->min_rate; in ccu_nm_round_rate()
Dccu_mp.c288 req->min_rate *= 2; in ccu_mp_mmc_determine_rate()
297 req->min_rate /= 2; in ccu_mp_mmc_determine_rate()
/drivers/net/ethernet/mellanox/mlx5/core/
Drl.c148 return (rate <= table->max_rate && rate >= table->min_rate); in mlx5_rl_is_in_range()
172 rl->rate, table->min_rate, table->max_rate); in mlx5_rl_add_rate()
251 table->min_rate = MLX5_CAP_QOS(dev, packet_pacing_min_rate); in mlx5_init_rl_table()
267 table->min_rate >> 10, in mlx5_init_rl_table()
Deswitch.c2141 ivi->min_tx_rate = evport->info.min_rate; in mlx5_eswitch_get_vport_config()
2370 if (!evport->enabled || evport->info.min_rate < max_guarantee) in calculate_vports_min_rate_divider()
2372 max_guarantee = evport->info.min_rate; in calculate_vports_min_rate_divider()
2391 vport_min_rate = evport->info.min_rate; in normalize_vports_min_rate()
2415 u32 max_rate, u32 min_rate) in mlx5_eswitch_set_vport_rate() argument
2435 if ((min_rate && !min_rate_supported) || (max_rate && !max_rate_supported)) in mlx5_eswitch_set_vport_rate()
2440 if (min_rate == evport->info.min_rate) in mlx5_eswitch_set_vport_rate()
2443 previous_min_rate = evport->info.min_rate; in mlx5_eswitch_set_vport_rate()
2444 evport->info.min_rate = min_rate; in mlx5_eswitch_set_vport_rate()
2448 evport->info.min_rate = previous_min_rate; in mlx5_eswitch_set_vport_rate()
/drivers/gpu/drm/msm/dsi/pll/
Ddsi_pll.c56 if (rate < pll->min_rate) in msm_dsi_pll_helper_clk_round_rate()
57 return pll->min_rate; in msm_dsi_pll_helper_clk_round_rate()
Ddsi_pll.h24 unsigned long min_rate; member
/drivers/clk/at91/
Dclk-generated.c127 unsigned long min_rate, parent_rate; in clk_generated_determine_rate() local
138 min_rate = DIV_ROUND_CLOSEST(parent_rate, GENERATED_MAX_DIV + 1); in clk_generated_determine_rate()
140 (gck->range.max && min_rate > gck->range.max)) in clk_generated_determine_rate()
Dclk-audio-pll.c255 req->min_rate = max(req->min_rate, AUDIO_PLL_FOUT_MIN); in clk_audio_pll_frac_determine_rate()
/drivers/media/platform/qcom/camss/
Dcamss-csiphy.c123 u64 min_rate = pixel_clock * bpp / (2 * num_lanes * 4); in csiphy_set_clock_rates() local
126 camss_add_clock_margin(&min_rate); in csiphy_set_clock_rates()
129 if (min_rate < clock->freq[j]) in csiphy_set_clock_rates()
140 if (min_rate == 0) in csiphy_set_clock_rates()
Dcamss-vfe.c1130 u64 min_rate = 0; in vfe_set_clock_rates() local
1148 if (min_rate < tmp) in vfe_set_clock_rates()
1149 min_rate = tmp; in vfe_set_clock_rates()
1152 camss_add_clock_margin(&min_rate); in vfe_set_clock_rates()
1155 if (min_rate < clock->freq[j]) in vfe_set_clock_rates()
1166 if (min_rate == 0) in vfe_set_clock_rates()
1212 u64 min_rate = 0; in vfe_check_clock_rates() local
1230 if (min_rate < tmp) in vfe_check_clock_rates()
1231 min_rate = tmp; in vfe_check_clock_rates()
1234 camss_add_clock_margin(&min_rate); in vfe_check_clock_rates()
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Dcamss-csid.c484 u64 min_rate = pixel_clock * f->bpp / in csid_set_clock_rates() local
488 camss_add_clock_margin(&min_rate); in csid_set_clock_rates()
491 if (min_rate < clock->freq[j]) in csid_set_clock_rates()
502 if (min_rate == 0) in csid_set_clock_rates()
/drivers/clk/qcom/
Dclk-hfpll.h27 unsigned long min_rate; member
Dhfpll.c30 .min_rate = 537600000UL,
Dgcc-msm8960.c92 .min_rate = 600000000UL,
118 .min_rate = 600000000UL,
132 .min_rate = 600000000UL,
158 .min_rate = 600000000UL,
184 .min_rate = 600000000UL,
210 .min_rate = 600000000UL,
224 .min_rate = 600000000UL,
/drivers/firmware/arm_scmi/
Dclock.c164 clk->range.min_rate = RATE_TO_U64(rlist->rate[0]); in scmi_clock_describe_rates_get()
168 clk->range.min_rate, clk->range.max_rate, in scmi_clock_describe_rates_get()
/drivers/net/wireless/rsi/
Drsi_91x_mgmt.c279 common->min_rate = 0xffff; in rsi_set_default_parameters()
1308 u16 *selected_rates, min_rate; in rsi_send_auto_rate_request() local
1359 min_rate = RSI_RATE_MCS0; in rsi_send_auto_rate_request()
1361 min_rate = RSI_RATE_1; in rsi_send_auto_rate_request()
1365 min_rate = RSI_RATE_MCS0; in rsi_send_auto_rate_request()
1367 min_rate = RSI_RATE_6; in rsi_send_auto_rate_request()
1422 auto_rate->supported_rates[ii] = cpu_to_le16(min_rate); in rsi_send_auto_rate_request()
1470 if (common->min_rate == 0xffff) in rsi_inform_bss_status()
/drivers/clk/davinci/
Dpll.c139 if (rate < req->min_rate) in davinci_pll_determine_rate()
148 if (best_rate < req->min_rate) in davinci_pll_determine_rate()
165 if (r < req->min_rate) in davinci_pll_determine_rate()

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