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Searched refs:min_sclk (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/amd/powerplay/hwmgr/
Dsmu10_hwmgr.c571 uint32_t min_sclk = hwmgr->display_config->min_core_set_clock; in smu10_dpm_force_dpm_level() local
579 if (min_sclk < data->gfx_min_freq_limit) in smu10_dpm_force_dpm_level()
580 min_sclk = data->gfx_min_freq_limit; in smu10_dpm_force_dpm_level()
582 min_sclk /= 100; /* transfer 10KHz to MHz */ in smu10_dpm_force_dpm_level()
618 min_sclk); in smu10_dpm_force_dpm_level()
621 min_sclk); in smu10_dpm_force_dpm_level()
661 min_sclk); in smu10_dpm_force_dpm_level()
Dvega12_hwmgr.c712 hwmgr->default_compute_power_profile.min_sclk =
2477 uint32_t min_sclk, uint32_t min_mclk)
2485 dpm_table->gfx_table.dpm_levels[i].value >= min_sclk) {
/drivers/gpu/drm/radeon/
Dtrinity_dpm.h79 u32 min_sclk; member
Dtrinity_dpm.c1404 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in trinity_patch_thermal_state()
1543 u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */ in trinity_apply_state_adjust_rules() local
1544 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in trinity_apply_state_adjust_rules()
1567 if (ps->levels[i].sclk < min_sclk) in trinity_apply_state_adjust_rules()
1569 trinity_get_valid_engine_clock(rdev, min_sclk); in trinity_apply_state_adjust_rules()
1867 pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_7.ulMinEngineClock); in trinity_parse_sys_info_table()
Dsumo_dpm.c1047 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in sumo_patch_thermal_state()
1094 u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */ in sumo_apply_state_adjust_rules() local
1095 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in sumo_apply_state_adjust_rules()
1115 if (ps->levels[i].sclk < min_sclk) in sumo_apply_state_adjust_rules()
1117 sumo_get_valid_engine_clock(rdev, min_sclk); in sumo_apply_state_adjust_rules()
1675 pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_6.ulMinEngineClock); in sumo_parse_sys_info_table()
Dsumo_dpm.h83 u32 min_sclk; member
Dni_dpm.c2460 u32 min_sclk; in ni_populate_power_containment_values() local
2511 min_sclk = max_sclk; in ni_populate_power_containment_values()
2513 min_sclk = prev_sclk; in ni_populate_power_containment_values()
2515 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in ni_populate_power_containment_values()
2517 if (min_sclk < state->performance_levels[0].sclk) in ni_populate_power_containment_values()
2518 min_sclk = state->performance_levels[0].sclk; in ni_populate_power_containment_values()
2520 if (min_sclk == 0) in ni_populate_power_containment_values()
2524 (u8)((NISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in ni_populate_power_containment_values()
Dsi_dpm.c2298 u32 min_sclk; in si_populate_power_containment_values() local
2338 min_sclk = max_sclk; in si_populate_power_containment_values()
2340 min_sclk = prev_sclk; in si_populate_power_containment_values()
2342 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in si_populate_power_containment_values()
2345 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()
2346 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()
2348 if (min_sclk == 0) in si_populate_power_containment_values()
2372 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values()
Dkv_dpm.c2145 u32 min_sclk = 10000; /* ??? */ in kv_apply_state_adjust_rules() local
2164 sclk = min_sclk; in kv_apply_state_adjust_rules()
/drivers/gpu/drm/amd/amdgpu/
Dsi_dpm.c2395 u32 min_sclk; in si_populate_power_containment_values() local
2435 min_sclk = max_sclk; in si_populate_power_containment_values()
2437 min_sclk = prev_sclk; in si_populate_power_containment_values()
2439 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in si_populate_power_containment_values()
2441 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()
2442 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()
2444 if (min_sclk == 0) in si_populate_power_containment_values()
2468 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values()
Dkv_dpm.c2210 u32 min_sclk = 10000; /* ??? */ in kv_apply_state_adjust_rules() local
2229 sclk = min_sclk; in kv_apply_state_adjust_rules()