Searched refs:mp1_state (Results 1 – 9 of 9) sorted by relevance
277 int (*set_mp1_state)(void *handle, enum pp_mp1_state mp1_state);
2239 adev->mp1_state); in amdgpu_device_ip_suspend_phase2()2242 adev->mp1_state, r); in amdgpu_device_ip_suspend_phase2()3737 adev->mp1_state = PP_MP1_STATE_SHUTDOWN; in amdgpu_device_lock_adev()3740 adev->mp1_state = PP_MP1_STATE_RESET; in amdgpu_device_lock_adev()3743 adev->mp1_state = PP_MP1_STATE_NONE; in amdgpu_device_lock_adev()3759 adev->mp1_state = PP_MP1_STATE_NONE; in amdgpu_device_unlock_adev()
1150 adev->mp1_state = PP_MP1_STATE_UNLOAD; in amdgpu_pci_shutdown()1152 adev->mp1_state = PP_MP1_STATE_NONE; in amdgpu_pci_shutdown()
1006 enum pp_mp1_state mp1_state; member
927 static int pp_dpm_set_mp1_state(void *handle, enum pp_mp1_state mp1_state) in pp_dpm_set_mp1_state() argument935 return hwmgr->hwmgr_func->set_mp1_state(hwmgr, mp1_state); in pp_dpm_set_mp1_state()
355 int (*set_mp1_state)(struct pp_hwmgr *hwmgr, enum pp_mp1_state mp1_state);
2643 enum pp_mp1_state mp1_state) in vega12_set_mp1_state() argument2648 switch (mp1_state) { in vega12_set_mp1_state()
3119 enum pp_mp1_state mp1_state) in vega20_set_mp1_state() argument3124 switch (mp1_state) { in vega20_set_mp1_state()
5222 enum pp_mp1_state mp1_state) in vega10_set_mp1_state() argument5227 switch (mp1_state) { in vega10_set_mp1_state()