Home
last modified time | relevance | path

Searched refs:mpll_dq_func_cntl_2 (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/radeon/
Drv740_dpm.c194 u32 mpll_dq_func_cntl_2 = pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv740_populate_mclk_value() local
240 mpll_dq_func_cntl_2 |= VCO_MODE; in rv740_populate_mclk_value()
242 mpll_dq_func_cntl_2 &= ~VCO_MODE; in rv740_populate_mclk_value()
275 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_mclk_value()
305 pi->clk_regs.rv770.mpll_dq_func_cntl_2 = in rv740_read_clock_registers()
321 u32 mpll_dq_func_cntl_2 = pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv740_populate_smc_acpi_state() local
348 mpll_dq_func_cntl_2 |= BYPASS | BIAS_GEN_PDNB | RESET_EN; in rv740_populate_smc_acpi_state()
376 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_smc_acpi_state()
Dcypress_dpm.c487 u32 mpll_dq_func_cntl_2 = in cypress_populate_mclk_value() local
488 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in cypress_populate_mclk_value()
549 mpll_dq_func_cntl_2 |= VCO_MODE; in cypress_populate_mclk_value()
551 mpll_dq_func_cntl_2 &= ~VCO_MODE; in cypress_populate_mclk_value()
602 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in cypress_populate_mclk_value()
1251 cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl_2); in cypress_populate_smc_initial_state()
1342 u32 mpll_dq_func_cntl_2 = in cypress_populate_smc_acpi_state() local
1343 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in cypress_populate_smc_acpi_state()
1398 mpll_dq_func_cntl_2 |= BIAS_GEN_PDNB | RESET_EN | BYPASS; in cypress_populate_smc_acpi_state()
1441 cpu_to_be32(mpll_dq_func_cntl_2); in cypress_populate_smc_acpi_state()
Drv770_dpm.c397 u32 mpll_dq_func_cntl_2 = in rv770_populate_mclk_value() local
398 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv770_populate_mclk_value()
467 mpll_dq_func_cntl_2 |= VCO_MODE; in rv770_populate_mclk_value()
469 mpll_dq_func_cntl_2 &= ~VCO_MODE; in rv770_populate_mclk_value()
476 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv770_populate_mclk_value()
925 u32 mpll_dq_func_cntl_2 = in rv770_populate_smc_acpi_state() local
926 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv770_populate_smc_acpi_state()
963 mpll_dq_func_cntl_2 |= BIAS_GEN_PDNB | RESET_EN; in rv770_populate_smc_acpi_state()
984 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv770_populate_smc_acpi_state()
1037 cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl_2); in rv770_populate_smc_initial_state()
[all …]
Dni_dpm.h42 u32 mpll_dq_func_cntl_2; member
Dni_dpm.c1194 ni_pi->clock_registers.mpll_dq_func_cntl_2 = RREG32(MPLL_DQ_FUNC_CNTL_2); in ni_read_clock_registers()
1699 cpu_to_be32(ni_pi->clock_registers.mpll_dq_func_cntl_2); in ni_populate_smc_initial_state()
1801 u32 mpll_dq_func_cntl_2 = ni_pi->clock_registers.mpll_dq_func_cntl_2; in ni_populate_smc_acpi_state() local
1872 mpll_dq_func_cntl_2 |= BIAS_GEN_PDNB | RESET_EN | BYPASS; in ni_populate_smc_acpi_state()
1908 table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in ni_populate_smc_acpi_state()
2172 u32 mpll_dq_func_cntl_2 = ni_pi->clock_registers.mpll_dq_func_cntl_2; in ni_populate_mclk_value() local
2231 mpll_dq_func_cntl_2 |= VCO_MODE; in ni_populate_mclk_value()
2233 mpll_dq_func_cntl_2 &= ~VCO_MODE; in ni_populate_mclk_value()
2285 mclk->vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in ni_populate_mclk_value()
Drv770_dpm.h38 u32 mpll_dq_func_cntl_2; member
/drivers/gpu/drm/amd/amdgpu/
Dsi_dpm.h360 u32 mpll_dq_func_cntl_2; member
504 u32 mpll_dq_func_cntl_2; member