Searched refs:new_active_crtcs (Results 1 – 10 of 10) sorted by relevance
1040 if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()1045 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()1054 if (rdev->pm.dpm.new_active_crtcs == in radeon_dpm_change_power_state_locked()1064 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()1110 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()1730 rdev->pm.dpm.new_active_crtcs = 0; in radeon_pm_compute_clocks_dpm()1737 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_dpm()
1765 (!(rdev->pm.dpm.new_active_crtcs & (1 << pipe)))) { in cypress_program_display_gap()1768 if (rdev->pm.dpm.new_active_crtcs & (1 << i)) in cypress_program_display_gap()
1185 if (rdev->pm.dpm.new_active_crtcs & 1) { in rv6xx_program_display_gap()1188 } else if (rdev->pm.dpm.new_active_crtcs & 2) { in rv6xx_program_display_gap()
1346 if (rdev->pm.dpm.new_active_crtcs & 1) { in rv770_program_display_gap()1349 } else if (rdev->pm.dpm.new_active_crtcs & 2) { in rv770_program_display_gap()
3704 (!(rdev->pm.dpm.new_active_crtcs & (1 << pipe)))) { in si_program_display_gap()3707 if (rdev->pm.dpm.new_active_crtcs & (1 << i)) in si_program_display_gap()5326 if (rdev->pm.dpm.new_active_crtcs & (1 << i)) { in si_upload_smc_data()
1555 u32 new_active_crtcs; member
406 u32 new_active_crtcs; member
124 adev->pm.dpm.new_active_crtcs = 0; in amdgpu_dpm_get_active_displays()131 adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id); in amdgpu_dpm_get_active_displays()
4169 (!(adev->pm.dpm.new_active_crtcs & (1 << pipe)))) { in si_program_display_gap()4172 if (adev->pm.dpm.new_active_crtcs & (1 << i)) in si_program_display_gap()5786 if (adev->pm.dpm.new_active_crtcs & (1 << i)) { in si_upload_smc_data()
2644 adev->pm.dpm.current_active_crtcs = adev->pm.dpm.new_active_crtcs; in amdgpu_dpm_change_power_state_locked()