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Searched refs:nvif_wr08 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/nouveau/dispnv04/
Dhw.h123 nvif_wr08(device, NV_PRMCIO_CRX__COLOR + head * NV_PRMCIO_SIZE, index); in NVWriteVgaCrtc()
124 nvif_wr08(device, NV_PRMCIO_CR__COLOR + head * NV_PRMCIO_SIZE, value); in NVWriteVgaCrtc()
132 nvif_wr08(device, NV_PRMCIO_CRX__COLOR + head * NV_PRMCIO_SIZE, index); in NVReadVgaCrtc()
191 nvif_wr08(device, reg, value); in NVWritePRMVIO()
198 nvif_wr08(device, NV_PRMCIO_ARX + head * NV_PRMCIO_SIZE, enable ? 0 : 0x20); in NVSetEnablePalette()
218 nvif_wr08(device, NV_PRMCIO_ARX + head * NV_PRMCIO_SIZE, index); in NVWriteVgaAttr()
219 nvif_wr08(device, NV_PRMCIO_AR__WRITE + head * NV_PRMCIO_SIZE, value); in NVWriteVgaAttr()
233 nvif_wr08(device, NV_PRMCIO_ARX + head * NV_PRMCIO_SIZE, index); in NVReadVgaAttr()
Ddac.c171 nvif_wr08(device, NV_PRMDIO_READ_MODE_ADDRESS, 0x0); in nv04_dac_detect()
175 nvif_wr08(device, NV_PRMDIO_PIXEL_MASK, 0); in nv04_dac_detect()
188 nvif_wr08(device, NV_PRMDIO_WRITE_MODE_ADDRESS, 0); in nv04_dac_detect()
189 nvif_wr08(device, NV_PRMDIO_PALETTE_DATA, 0); in nv04_dac_detect()
190 nvif_wr08(device, NV_PRMDIO_PALETTE_DATA, 0); in nv04_dac_detect()
192 nvif_wr08(device, NV_PRMDIO_PALETTE_DATA, blue); in nv04_dac_detect()
215 nvif_wr08(device, NV_PRMDIO_PIXEL_MASK, saved_palette_mask); in nv04_dac_detect()
217 nvif_wr08(device, NV_PRMDIO_WRITE_MODE_ADDRESS, 0); in nv04_dac_detect()
219 nvif_wr08(device, NV_PRMDIO_PALETTE_DATA, saved_palette0[i]); in nv04_dac_detect()
Dhw.c780 nvif_wr08(device, NV_PRMDIO_PIXEL_MASK + head_offset, in nv_save_state_palette()
782 nvif_wr08(device, NV_PRMDIO_READ_MODE_ADDRESS + head_offset, 0x0); in nv_save_state_palette()
799 nvif_wr08(device, NV_PRMDIO_PIXEL_MASK + head_offset, in nouveau_hw_load_state_palette()
801 nvif_wr08(device, NV_PRMDIO_WRITE_MODE_ADDRESS + head_offset, 0x0); in nouveau_hw_load_state_palette()
804 nvif_wr08(device, NV_PRMDIO_PALETTE_DATA + head_offset, in nouveau_hw_load_state_palette()
/drivers/gpu/drm/nouveau/include/nvif/
Dobject.h61 #define nvif_wr08(a,b,c) nvif_wr((a), iowrite8, 1, (b), (u8)(c)) macro