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Searched refs:phyclk_mhz (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Damdgpu_socbb.h34 uint32_t phyclk_mhz; member
/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_resource.c166 .phyclk_mhz = 600.0,
177 .phyclk_mhz = 600.0,
188 .phyclk_mhz = 810.0,
199 .phyclk_mhz = 810.0,
210 .phyclk_mhz = 810.0,
222 .phyclk_mhz = 810.0,
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_resource.c169 .phyclk_mhz = 540.0,
180 .phyclk_mhz = 600.0,
191 .phyclk_mhz = 810.0,
202 .phyclk_mhz = 810.0,
213 .phyclk_mhz = 810.0,
225 .phyclk_mhz = 810.0,
3009 if ((bb->clock_limits[i].phyclk_mhz > (max_clocks.phyClockInKhz / 1000)) in cap_soc_clocks()
3011 bb->clock_limits[i].phyclk_mhz = (max_clocks.phyClockInKhz / 1000); in cap_soc_clocks()
3038 if (bb->clock_limits[i-1].phyclk_mhz != bb->clock_limits[i].phyclk_mhz) in cap_soc_clocks()
3089 calculated_states[i].phyclk_mhz = max_clocks->phyClockInKhz / 1000; in update_bounding_box()
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/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_mode_structs.h64 double phyclk_mhz; member
Ddisplay_mode_vba.c257 mode_lib->vba.PHYCLKPerState[i] = soc->clock_limits[i].phyclk_mhz; in fetch_socbb_params()