Home
last modified time | relevance | path

Searched refs:primary (Results 1 – 25 of 229) sorted by relevance

12345678910

/drivers/mfd/
Dwm8350-irq.c35 int primary; member
43 .primary = WM8350_OC_INT,
49 .primary = WM8350_UV_INT,
54 .primary = WM8350_UV_INT,
59 .primary = WM8350_UV_INT,
64 .primary = WM8350_UV_INT,
69 .primary = WM8350_UV_INT,
74 .primary = WM8350_UV_INT,
79 .primary = WM8350_UV_INT,
84 .primary = WM8350_UV_INT,
[all …]
Dwm831x-irq.c26 int primary; member
33 .primary = WM831X_TEMP_INT,
38 .primary = WM831X_GP_INT,
43 .primary = WM831X_GP_INT,
48 .primary = WM831X_GP_INT,
53 .primary = WM831X_GP_INT,
58 .primary = WM831X_GP_INT,
63 .primary = WM831X_GP_INT,
68 .primary = WM831X_GP_INT,
73 .primary = WM831X_GP_INT,
[all …]
/drivers/gpu/drm/mga/
Dmga_dma.c78 drm_mga_primary_buffer_t *primary = &dev_priv->prim; in mga_do_dma_reset() local
84 primary->tail = 0; in mga_do_dma_reset()
85 primary->space = primary->size; in mga_do_dma_reset()
86 primary->last_flush = 0; in mga_do_dma_reset()
105 drm_mga_primary_buffer_t *primary = &dev_priv->prim; in mga_do_dma_flush() local
120 if (primary->tail == primary->last_flush) { in mga_do_dma_flush()
125 tail = primary->tail + dev_priv->primary->offset; in mga_do_dma_flush()
139 primary->last_flush = primary->tail; in mga_do_dma_flush()
144 primary->space = primary->size - primary->tail; in mga_do_dma_flush()
146 primary->space = head - tail; in mga_do_dma_flush()
[all …]
/drivers/gpu/drm/radeon/
Dradeon_dp_mst.c28 static int radeon_dp_mst_set_be_cntl(struct radeon_encoder *primary, in radeon_dp_mst_set_be_cntl() argument
32 struct drm_device *dev = primary->base.dev; in radeon_dp_mst_set_be_cntl()
38 reg = RREG32(NI_DIG_BE_CNTL + primary->offset); in radeon_dp_mst_set_be_cntl()
50 DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DIG_BE_CNTL + primary->offset, reg); in radeon_dp_mst_set_be_cntl()
51 WREG32(NI_DIG_BE_CNTL + primary->offset, reg); in radeon_dp_mst_set_be_cntl()
60 DRM_ERROR("timed out waiting for FE %d %d\n", primary->offset, mst_enc->fe); in radeon_dp_mst_set_be_cntl()
65 static int radeon_dp_mst_set_stream_attrib(struct radeon_encoder *primary, in radeon_dp_mst_set_stream_attrib() argument
70 struct drm_device *dev = primary->base.dev; in radeon_dp_mst_set_stream_attrib()
79 temp = RREG32(NI_DP_MSE_SAT0 + satreg + primary->offset); in radeon_dp_mst_set_stream_attrib()
89 DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DP_MSE_SAT0 + satreg + primary->offset, temp); in radeon_dp_mst_set_stream_attrib()
[all …]
/drivers/gpu/drm/
Ddrm_modeset_helper.c112 struct drm_plane *primary; in create_primary_plane() local
115 primary = kzalloc(sizeof(*primary), GFP_KERNEL); in create_primary_plane()
116 if (primary == NULL) { in create_primary_plane()
125 primary->format_default = true; in create_primary_plane()
128 ret = drm_universal_plane_init(dev, primary, 0, in create_primary_plane()
135 kfree(primary); in create_primary_plane()
136 primary = NULL; in create_primary_plane()
139 return primary; in create_primary_plane()
172 struct drm_plane *primary; in drm_crtc_init() local
174 primary = create_primary_plane(dev); in drm_crtc_init()
[all …]
Ddrm_crtc.c227 struct drm_plane *primary, in drm_crtc_init_with_planes() argument
235 WARN_ON(primary && primary->type != DRM_PLANE_TYPE_PRIMARY); in drm_crtc_init_with_planes()
282 crtc->primary = primary; in drm_crtc_init_with_planes()
284 if (primary && !primary->possible_crtcs) in drm_crtc_init_with_planes()
285 primary->possible_crtcs = drm_crtc_mask(crtc); in drm_crtc_init_with_planes()
373 plane = crtc->primary; in drm_mode_getcrtc()
434 struct drm_plane *plane = tmp->primary; in __drm_mode_set_config_internal()
443 struct drm_plane *plane = crtc->primary; in __drm_mode_set_config_internal()
450 struct drm_plane *plane = tmp->primary; in __drm_mode_set_config_internal()
503 drm_rotation_90_or_270(crtc->primary->state->rotation)) in drm_crtc_check_viewport()
[all …]
Ddrm_crtc_helper.c191 crtc->primary->fb = NULL; in __drm_helper_disable_unused_functions()
584 save_set.fb = set->crtc->primary->fb; in drm_crtc_helper_set_config()
588 if (set->crtc->primary->fb != set->fb) { in drm_crtc_helper_set_config()
590 if (set->crtc->primary->fb == NULL) { in drm_crtc_helper_set_config()
593 } else if (set->fb->format != set->crtc->primary->fb->format) { in drm_crtc_helper_set_config()
709 set->crtc->primary->fb = set->fb; in drm_crtc_helper_set_config()
715 set->crtc->primary->fb = save_set.fb; in drm_crtc_helper_set_config()
730 set->crtc->primary->fb = set->fb; in drm_crtc_helper_set_config()
736 set->crtc->primary->fb = save_set.fb; in drm_crtc_helper_set_config()
935 crtc->x, crtc->y, crtc->primary->fb); in drm_helper_resume_force_mode()
Ddrm_sysfs.c284 device_create_with_groups(drm_class, dev->primary->kdev, 0, in drm_sysfs_connector_add()
286 "card%d-%s", dev->primary->index, in drm_sysfs_connector_add()
327 kobject_uevent_env(&dev->primary->kdev->kobj, KOBJ_CHANGE, envp); in drm_sysfs_lease_event()
348 kobject_uevent_env(&dev->primary->kdev->kobj, KOBJ_CHANGE, envp); in drm_sysfs_hotplug_event()
379 kobject_uevent_env(&dev->primary->kdev->kobj, KOBJ_CHANGE, envp); in drm_sysfs_connector_status_event()
/drivers/gpu/drm/v3d/
Dv3d_trace.h26 __entry->dev = dev->primary->index;
52 __entry->dev = dev->primary->index;
78 __entry->dev = dev->primary->index;
98 __entry->dev = dev->primary->index;
118 __entry->dev = dev->primary->index;
138 __entry->dev = dev->primary->index;
157 __entry->dev = dev->primary->index;
177 __entry->dev = dev->primary->index;
197 __entry->dev = dev->primary->index;
219 __entry->dev = dev->primary->index;
[all …]
/drivers/ide/
Dide-generic.c43 static void ide_generic_check_pci_legacy_iobases(int *primary, int *secondary) in ide_generic_check_pci_legacy_iobases() argument
51 *primary = 1; in ide_generic_check_pci_legacy_iobases()
59 *primary = *secondary = 1; in ide_generic_check_pci_legacy_iobases()
70 *primary = 1; in ide_generic_check_pci_legacy_iobases()
81 int i, rc = 0, primary = 0, secondary = 0; in ide_generic_init() local
83 ide_generic_check_pci_legacy_iobases(&primary, &secondary); in ide_generic_init()
89 if (primary == 0) in ide_generic_init()
/drivers/gpu/drm/fsl-dcu/
Dfsl_dcu_drm_plane.c209 struct drm_plane *primary; in fsl_dcu_drm_primary_create_plane() local
212 primary = kzalloc(sizeof(*primary), GFP_KERNEL); in fsl_dcu_drm_primary_create_plane()
213 if (!primary) { in fsl_dcu_drm_primary_create_plane()
219 ret = drm_universal_plane_init(dev, primary, 0, in fsl_dcu_drm_primary_create_plane()
225 kfree(primary); in fsl_dcu_drm_primary_create_plane()
226 primary = NULL; in fsl_dcu_drm_primary_create_plane()
228 drm_plane_helper_add(primary, &fsl_dcu_drm_plane_helper_funcs); in fsl_dcu_drm_primary_create_plane()
230 return primary; in fsl_dcu_drm_primary_create_plane()
Dfsl_dcu_drm_crtc.c170 struct drm_plane *primary; in fsl_dcu_drm_crtc_create() local
176 primary = fsl_dcu_drm_primary_create_plane(fsl_dev->drm); in fsl_dcu_drm_crtc_create()
177 if (!primary) in fsl_dcu_drm_crtc_create()
180 ret = drm_crtc_init_with_planes(fsl_dev->drm, crtc, primary, NULL, in fsl_dcu_drm_crtc_create()
183 primary->funcs->destroy(primary); in fsl_dcu_drm_crtc_create()
/drivers/mtd/chips/
Dgen_probe.c200 int primary) in cfi_cmdset_unknown() argument
203 __u16 type = primary?cfi->cfiq->P_ID:cfi->cfiq->A_ID; in cfi_cmdset_unknown()
222 mtd = (*probe_function)(map, primary); in cfi_cmdset_unknown()
233 static struct mtd_info *check_cmd_set(struct map_info *map, int primary) in check_cmd_set() argument
236 __u16 type = primary?cfi->cfiq->P_ID:cfi->cfiq->A_ID; in check_cmd_set()
248 return cfi_cmdset_0001(map, primary); in check_cmd_set()
254 return cfi_cmdset_0002(map, primary); in check_cmd_set()
258 return cfi_cmdset_0020(map, primary); in check_cmd_set()
261 return cfi_cmdset_unknown(map, primary); in check_cmd_set()
/drivers/gpu/drm/vkms/
Dvkms_output.c45 struct drm_plane *primary, *cursor = NULL; in vkms_output_init() local
48 primary = vkms_plane_init(vkmsdev, DRM_PLANE_TYPE_PRIMARY, index); in vkms_output_init()
49 if (IS_ERR(primary)) in vkms_output_init()
50 return PTR_ERR(primary); in vkms_output_init()
60 ret = vkms_crtc_init(dev, crtc, primary, cursor); in vkms_output_init()
105 drm_plane_cleanup(primary); in vkms_output_init()
/drivers/net/wireless/intel/iwlwifi/mvm/
Dcoex.c271 struct ieee80211_chanctx_conf *primary; member
313 swap(data->primary, data->secondary); in iwl_mvm_bt_coex_tcm_based_ci()
389 data->secondary = data->primary; in iwl_mvm_bt_notif_iterator()
390 data->primary = chanctx_conf; in iwl_mvm_bt_notif_iterator()
397 if (chanctx_conf == data->primary) in iwl_mvm_bt_notif_iterator()
405 data->secondary = data->primary; in iwl_mvm_bt_notif_iterator()
406 data->primary = chanctx_conf; in iwl_mvm_bt_notif_iterator()
412 if (data->primary == chanctx_conf) in iwl_mvm_bt_notif_iterator()
423 if (!data->primary || data->primary == chanctx_conf) in iwl_mvm_bt_notif_iterator()
424 data->primary = chanctx_conf; in iwl_mvm_bt_notif_iterator()
[all …]
/drivers/gpu/drm/arc/
Darcpgu_crtc.c31 const struct drm_framebuffer *fb = crtc->primary->state->fb; in arc_pgu_set_pxl_fmt()
222 struct drm_plane *primary; in arc_pgu_setup_crtc() local
225 primary = arc_pgu_plane_init(drm); in arc_pgu_setup_crtc()
226 if (IS_ERR(primary)) in arc_pgu_setup_crtc()
227 return PTR_ERR(primary); in arc_pgu_setup_crtc()
229 ret = drm_crtc_init_with_planes(drm, &arcpgu->crtc, primary, NULL, in arc_pgu_setup_crtc()
232 arc_pgu_plane_destroy(primary); in arc_pgu_setup_crtc()
/drivers/sh/intc/
Dcore.c80 unsigned int data[2], primary; in intc_register_irq() local
98 primary = 0; in intc_register_irq()
100 primary = 1; in intc_register_irq()
109 if (!data[primary]) in intc_register_irq()
110 primary ^= 1; in intc_register_irq()
112 BUG_ON(!data[primary]); /* must have primary masking method */ in intc_register_irq()
119 irq_set_chip_data(irq, (void *)data[primary]); in intc_register_irq()
127 if (data[!primary]) in intc_register_irq()
128 _intc_enable(irq_data, data[!primary]); in intc_register_irq()
136 if (primary) { in intc_register_irq()
/drivers/hv/
Dchannel_mgmt.c656 struct vmbus_channel *primary = channel->primary_channel; in init_vp_index() local
684 if ((channel->affinity_policy == HV_BALANCED) || (!primary)) { in init_vp_index()
696 primary = channel; in init_vp_index()
698 alloced_mask = &hv_context.hv_numa_map[primary->numa_node]; in init_vp_index()
701 cpumask_weight(cpumask_of_node(primary->numa_node))) { in init_vp_index()
710 cpumask_of_node(primary->numa_node)); in init_vp_index()
714 if (primary->affinity_policy == HV_LOCALIZED) { in init_vp_index()
721 if (cpumask_equal(&primary->alloced_cpus_in_node, in init_vp_index()
722 cpumask_of_node(primary->numa_node))) in init_vp_index()
723 cpumask_clear(&primary->alloced_cpus_in_node); in init_vp_index()
[all …]
/drivers/gpu/drm/vmwgfx/
Dvmwgfx_ldu.c100 fb = entry->base.crtc.primary->state->fb; in vmw_ldu_commit_list()
109 fb = entry->base.crtc.primary->state->fb; in vmw_ldu_commit_list()
359 struct drm_plane *primary, *cursor; in vmw_ldu_init() local
371 primary = &ldu->base.primary; in vmw_ldu_init()
388 vmw_du_plane_reset(primary); in vmw_ldu_init()
390 ret = drm_universal_plane_init(dev, &ldu->base.primary, in vmw_ldu_init()
400 drm_plane_helper_add(primary, &vmw_ldu_primary_plane_helper_funcs); in vmw_ldu_init()
412 drm_plane_cleanup(&ldu->base.primary); in vmw_ldu_init()
447 ret = drm_crtc_init_with_planes(dev, crtc, &ldu->base.primary, in vmw_ldu_init()
/drivers/gpu/drm/sti/
Dsti_compositor.c70 struct drm_plane *primary = NULL; in sti_compositor_bind() local
124 primary = sti_gdp_create(drm_dev, compo->dev, in sti_compositor_bind()
129 if (!primary) { in sti_compositor_bind()
140 if (crtc_id < mixer_id && primary) { in sti_compositor_bind()
142 primary, cursor); in sti_compositor_bind()
145 primary = NULL; in sti_compositor_bind()
/drivers/gpu/drm/i915/display/
Dintel_dp_mst.c47 struct intel_dp *intel_dp = &intel_mst->primary->dp; in intel_dp_mst_compute_link_config()
96 struct intel_dp *intel_dp = &intel_mst->primary->dp; in intel_dp_mst_compute_config()
194 mgr = &enc_to_mst(old_conn_state->best_encoder)->primary->dp.mst_mgr; in intel_dp_mst_atomic_check()
206 struct intel_digital_port *intel_dig_port = intel_mst->primary; in intel_mst_disable_dp()
230 struct intel_digital_port *intel_dig_port = intel_mst->primary; in intel_mst_post_disable_dp()
268 struct intel_digital_port *intel_dig_port = intel_mst->primary; in intel_mst_pre_pll_enable_dp()
281 struct intel_digital_port *intel_dig_port = intel_mst->primary; in intel_mst_post_pll_disable_dp()
295 struct intel_digital_port *intel_dig_port = intel_mst->primary; in intel_mst_pre_enable_dp()
342 struct intel_digital_port *intel_dig_port = intel_mst->primary; in intel_mst_enable_dp()
374 struct intel_digital_port *intel_dig_port = intel_mst->primary; in intel_dp_mst_enc_get_config()
[all …]
/drivers/gpu/drm/arm/
Dhdlcd_crtc.c86 const struct drm_framebuffer *fb = crtc->primary->state->fb; in hdlcd_set_pxl_fmt()
323 struct drm_plane *primary; in hdlcd_setup_crtc() local
326 primary = hdlcd_plane_init(drm); in hdlcd_setup_crtc()
327 if (IS_ERR(primary)) in hdlcd_setup_crtc()
328 return PTR_ERR(primary); in hdlcd_setup_crtc()
330 ret = drm_crtc_init_with_planes(drm, &hdlcd->crtc, primary, NULL, in hdlcd_setup_crtc()
/drivers/gpu/drm/i915/
Di915_trace.h181 __field(u16, primary)
199 __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY];
215 __entry->primary, __entry->sprite, __entry->cursor,
231 __field(u32, primary)
245 __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY];
256 __entry->primary, __entry->sprite0, __entry->sprite1, __entry->cursor,
445 __entry->dev = i915->drm.primary->index;
605 __entry->dev = vm->i915->drm.primary->index;
631 __entry->dev = vm->i915->drm.primary->index;
655 __entry->dev = vm->i915->drm.primary->index;
[all …]
/drivers/net/ethernet/netronome/nfp/nfpcore/
Dnfp_nsp_cmds.c16 __le16 primary; member
53 nspi->primary = le16_to_cpu(ni->primary); in __nfp_nsp_identify()
/drivers/net/bonding/
Dbond_procfs.c61 struct slave *curr, *primary; in bond_info_show_master() local
86 primary = rcu_dereference(bond->primary_slave); in bond_info_show_master()
88 primary ? primary->dev->name : "None"); in bond_info_show_master()
89 if (primary) { in bond_info_show_master()

12345678910