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Searched refs:pstate_mclk (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/amd/powerplay/
Darcturus_ppt.c548 smu->pstate_mclk = mem_table->dpm_levels[0].value; in arcturus_populate_umd_state_clk()
553 smu->pstate_mclk = mem_table->dpm_levels[ARCTURUS_UMD_PSTATE_MCLK_LEVEL].value; in arcturus_populate_umd_state_clk()
557 smu->pstate_mclk = smu->pstate_mclk * 100; in arcturus_populate_umd_state_clk()
Dvega20_ppt.c908 smu->pstate_mclk = mem_table->dpm_levels[0].value; in vega20_populate_umd_state_clk()
913 smu->pstate_mclk = mem_table->dpm_levels[VEGA20_UMD_PSTATE_MCLK_LEVEL].value; in vega20_populate_umd_state_clk()
917 smu->pstate_mclk = smu->pstate_mclk * 100; in vega20_populate_umd_state_clk()
Damdgpu_smu.c403 *((uint32_t *)data) = smu->pstate_mclk; in smu_common_read_sensor()
Damd_powerplay.c844 *((uint32_t *)value) = hwmgr->pstate_mclk; in pp_dpm_read_sensor()
Dnavi10_ppt.c805 smu->pstate_mclk = min_mclk_freq * 100; in navi10_populate_umd_state_clk()
/drivers/gpu/drm/amd/powerplay/inc/
Dhwmgr.h791 uint32_t pstate_mclk; member
Damdgpu_smu.h360 uint32_t pstate_mclk; member
/drivers/gpu/drm/amd/powerplay/hwmgr/
Dvega20_hwmgr.c1538 hwmgr->pstate_mclk = mem_table->dpm_levels[0].value; in vega20_populate_umdpstate_clocks()
1543 hwmgr->pstate_mclk = mem_table->dpm_levels[VEGA20_UMD_PSTATE_MCLK_LEVEL].value; in vega20_populate_umdpstate_clocks()
1547 hwmgr->pstate_mclk = hwmgr->pstate_mclk * 100; in vega20_populate_umdpstate_clocks()
Dsmu10_hwmgr.c535 hwmgr->pstate_mclk = SMU10_UMD_PSTATE_FCLK * 100; in smu10_hwmgr_backend_init()
Dsmu8_hwmgr.c1154 hwmgr->pstate_mclk = 0; in smu8_phm_unforce_dpm_levels()
Dvega10_hwmgr.c4044 hwmgr->pstate_mclk = table_info->vdd_dep_on_mclk->entries[VEGA10_UMD_PSTATE_MCLK_LEVEL].clk; in vega10_get_profiling_clk_mask()
Dsmu7_hwmgr.c2797 hwmgr->pstate_mclk = tmp_mclk; in smu7_get_profiling_clk()