| /drivers/net/ethernet/mellanox/mlx5/core/fpga/ |
| D | conn.c | 520 static int mlx5_fpga_conn_create_wq(struct mlx5_fpga_conn *conn, void *qpc) in mlx5_fpga_conn_create_wq() argument
529 return mlx5_wq_qp_create(mdev, &wqp, qpc, &conn->qp.wq, in mlx5_fpga_conn_create_wq()
538 u32 temp_qpc[MLX5_ST_SZ_DW(qpc)] = {0}; in mlx5_fpga_conn_create_qp()
539 void *in = NULL, *qpc; in mlx5_fpga_conn_create_qp() local
549 MLX5_SET(qpc, temp_qpc, log_rq_stride, ilog2(MLX5_SEND_WQE_DS) - 4); in mlx5_fpga_conn_create_qp()
550 MLX5_SET(qpc, temp_qpc, log_rq_size, ilog2(conn->qp.rq.size)); in mlx5_fpga_conn_create_qp()
551 MLX5_SET(qpc, temp_qpc, log_sq_size, ilog2(conn->qp.sq.size)); in mlx5_fpga_conn_create_qp()
581 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); in mlx5_fpga_conn_create_qp()
582 MLX5_SET(qpc, qpc, uar_page, fdev->conn_res.uar->index); in mlx5_fpga_conn_create_qp()
583 MLX5_SET(qpc, qpc, log_page_size, in mlx5_fpga_conn_create_qp()
[all …]
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| /drivers/net/ethernet/mellanox/mlx5/core/steering/ |
| D | dr_send.c | 111 u32 temp_qpc[MLX5_ST_SZ_DW(qpc)] = {}; in dr_create_rc_qp()
115 void *qpc; in dr_create_rc_qp() local
133 MLX5_SET(qpc, temp_qpc, log_rq_stride, ilog2(MLX5_SEND_WQE_DS) - 4); in dr_create_rc_qp()
134 MLX5_SET(qpc, temp_qpc, log_rq_size, ilog2(dr_qp->rq.wqe_cnt)); in dr_create_rc_qp()
135 MLX5_SET(qpc, temp_qpc, log_sq_size, ilog2(dr_qp->sq.wqe_cnt)); in dr_create_rc_qp()
161 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); in dr_create_rc_qp()
162 MLX5_SET(qpc, qpc, st, MLX5_QP_ST_RC); in dr_create_rc_qp()
163 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); in dr_create_rc_qp()
164 MLX5_SET(qpc, qpc, pd, attr->pdn); in dr_create_rc_qp()
165 MLX5_SET(qpc, qpc, uar_page, attr->uar->index); in dr_create_rc_qp()
[all …]
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| /drivers/infiniband/hw/mlx5/ |
| D | qp.c | 872 void *qpc; in create_user_qp() local
943 qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); in create_user_qp()
945 MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); in create_user_qp()
946 MLX5_SET(qpc, qpc, page_offset, offset); in create_user_qp()
948 MLX5_SET(qpc, qpc, uar_page, uar_index); in create_user_qp()
1037 void *qpc; in create_kernel_qp() local
1099 qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); in create_kernel_qp()
1100 MLX5_SET(qpc, qpc, uar_page, uar_index); in create_kernel_qp()
1101 MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); in create_kernel_qp()
1104 MLX5_SET(qpc, qpc, fre, 1); in create_kernel_qp()
[all …]
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| D | devx.c | 673 void *qpc; in devx_set_umem_valid() local
675 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); in devx_set_umem_valid()
676 MLX5_SET(qpc, qpc, dbr_umem_valid, 1); in devx_set_umem_valid()
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| D | mlx5_ib.h | 70 #define MLX5_USER_ASSIGNED_UIDX_MASK __mlx5_mask(qpc, user_index)
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| /drivers/net/ethernet/mellanox/mlx5/core/ |
| D | wq.c | 100 void *qpc, struct mlx5_wq_qp *wq, in mlx5_wq_qp_create() argument
103 u8 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride) + 4; in mlx5_wq_qp_create()
104 u8 log_rq_sz = MLX5_GET(qpc, qpc, log_rq_size); in mlx5_wq_qp_create()
106 u8 log_sq_sz = MLX5_GET(qpc, qpc, log_sq_size); in mlx5_wq_qp_create()
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| D | qp.c | 424 u32 opt_param_mask, void *qpc, in modify_qp_mbox_alloc() argument
444 memcpy(MLX5_ADDR_OF(typ##_in, in, qpc), _qpc, \ in modify_qp_mbox_alloc()
445 MLX5_ST_SZ_BYTES(qpc)); \ in modify_qp_mbox_alloc()
466 opt_param_mask, qpc, uid); in modify_qp_mbox_alloc()
472 opt_param_mask, qpc, uid); in modify_qp_mbox_alloc()
478 opt_param_mask, qpc, uid); in modify_qp_mbox_alloc()
484 opt_param_mask, qpc, uid); in modify_qp_mbox_alloc()
490 opt_param_mask, qpc, uid); in modify_qp_mbox_alloc()
496 opt_param_mask, qpc, uid); in modify_qp_mbox_alloc()
507 u32 opt_param_mask, void *qpc, in mlx5_core_qp_modify() argument
[all …]
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| D | wq.h | 85 void *qpc, struct mlx5_wq_qp *wq,
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| D | debugfs.c | 225 ctx = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, out, qpc); in qp_read_field()
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| /drivers/net/ethernet/mellanox/mlx4/ |
| D | resource_tracker.c | 746 static int handle_counter(struct mlx4_dev *dev, struct mlx4_qp_context *qpc,
753 struct mlx4_qp_context *qpc = inbox->buf + 8; in update_vport_qp_param() local
759 port = (qpc->pri_path.sched_queue & 0x40) ? 2 : 1; in update_vport_qp_param()
762 qp_type = (be32_to_cpu(qpc->flags) >> 16) & 0xff; in update_vport_qp_param()
764 err = handle_counter(dev, qpc, slave, port); in update_vport_qp_param()
782 qpc->param3 &= ~cpu_to_be32(MLX4_STRIP_VLAN); in update_vport_qp_param()
793 qpc->pri_path.vlan_control &= in update_vport_qp_param()
797 qpc->pri_path.vlan_control |= in update_vport_qp_param()
810 qpc->pri_path.vlan_control |= in update_vport_qp_param()
816 qpc->pri_path.vlan_control |= in update_vport_qp_param()
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| /drivers/net/ethernet/mellanox/mlx5/core/ipoib/ |
| D | ipoib.c | 226 void *qpc; in mlx5i_create_underlay_qp() local
233 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); in mlx5i_create_underlay_qp()
234 MLX5_SET(qpc, qpc, st, MLX5_QP_ST_UD); in mlx5i_create_underlay_qp()
235 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); in mlx5i_create_underlay_qp()
236 MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, in mlx5i_create_underlay_qp()
239 addr_path = MLX5_ADDR_OF(qpc, qpc, primary_address_path); in mlx5i_create_underlay_qp()
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