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Searched refs:r4 (Results 1 – 25 of 43) sorted by relevance

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/drivers/scsi/arm/
Dacornscsi-io.S22 stmfd sp!, {r4 - r7, lr}
29 ldmia r0!, {r3, r4, r5, r6}
31 orr r3, r3, r4, lsl #16
32 and r4, r5, lr
33 orr r4, r4, r6, lsl #16
41 LOADREGS(fd, sp!, {r4 - r7, pc})
45 ldmia r0!, {r3, r4, r5, r6}
47 orr r3, r3, r4, lsl #16
48 and r4, r5, lr
49 orr r4, r4, r6, lsl #16
[all …]
/drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/
Dg98.fuc0s152 iord $r4 I[$r3]
154 shl b32 $r5 $r4 1
162 bclr $r4 0x1e
163 iowr I[$r3] $r4
165 mov $r4 1
166 iowr I[$r3 + 0x200] $r4
172 iord $r4 I[$r3 + 0x100]
173 shl b32 $r15 $r4 1
207 and $r4 $r2 0x7ff
212 and $r5 $r4 0x7bf
[all …]
/drivers/memory/
Dti-emif-sram-pm.S50 stmfd sp!, {r4 - r11, lr} @ save registers on stack
52 adr r4, ti_emif_pm_sram_data
53 ldr r0, [r4, #EMIF_PM_BASE_ADDR_VIRT_OFFSET]
54 ldr r2, [r4, #EMIF_PM_REGS_VIRT_OFFSET]
99 ldr r5, [r4, #EMIF_PM_CONFIG_OFFSET]
123 add r4, r2, #EMIF_EXT_PHY_CTRL_VALS_OFFSET
127 str r1, [r4, r5]
133 ldmfd sp!, {r4 - r11, pc} @ restore regs and return
144 adr r4, ti_emif_pm_sram_data
145 ldr r0, [r4, #EMIF_PM_BASE_ADDR_PHYS_OFFSET]
[all …]
/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/
Dcom.fuc184 mov $r4 0x7700
185 mov $xtargets $r4
191 mov $r4 0x2100
192 iord $r4 I[$r4 + 0]
193 and $r4 1
194 shl b32 $r4 4
195 add b32 $r4 0x30
214 xdld $r4 $r5
221 ld b32 $r4 D[$r5 + 0]
222 shr b32 $r4 8
[all …]
/drivers/edac/
Dmce_amd.c440 u8 r4 = R4(ec); in cat_mc0_mce() local
448 switch (r4) { in cat_mc0_mce()
452 (r4 == R4_DRD ? "load/hw prf" : "store")); in cat_mc0_mce()
470 switch (r4) { in cat_mc0_mce()
600 u8 r4 = R4(ec); in cat_mc1_mce() local
609 if (r4 == R4_IRD) in cat_mc1_mce()
611 else if (r4 == R4_SNOOP) in cat_mc1_mce()
701 u8 r4 = R4(ec); in k8_mc2_mce() local
703 if (r4 >= 0x7) in k8_mc2_mce()
706 else if (r4 <= 0x1) in k8_mc2_mce()
[all …]
/drivers/misc/cxl/
Dtrace.h518 u64 p4, unsigned long r4, long rc),
520 TP_ARGS(unit_address, fct, p1, p2, p3, p4, r4, rc),
529 __field(unsigned long, r4)
540 __entry->r4 = r4;
551 __entry->r4,
599 u64 p4, unsigned long r4, long rc),
600 TP_ARGS(unit_address, fct, p1, p2, p3, p4, r4, rc)
610 u64 control_mask, u64 reset_mask, unsigned long r4,
614 control_mask, reset_mask, r4, rc),
621 __field(unsigned long, r4)
[all …]
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
Darith.fuc56 push $r4 // tmp1
69 mov b32 $r4 $r3
72 shr b32 $r4 16 // tmp1 = tmp0_hi
74 adc b32 $r11 $r4
78 mov b32 $r4 $r3
81 shr b32 $r4 16 // tmp1 = tmp0_hi
83 adc b32 $r11 $r4
89 pop $r4
Di2c_.fuc160 push $r4
161 mov $r4 (T_TIMEOUT / T_RISEFALL)
167 sub b32 $r4 1
170 pop $r4
236 mov $r4 8
242 sub b32 $r4 1
250 mov $r4 8
252 sub b32 $r4 1
253 xbit $r3 $r5 $r4
256 cmp b32 $r4 0
Dmemx.fuc80 // $r4 - packet length
124 // $r4 - packet length
167 // $r4 - packet length
205 // $r4 - packet length
218 // $r4 - packet length
228 sub b32 $r4 0x02
235 // $r4 - packet length
255 // $r4 - packet length
268 // $r4 - packet length
378 extr $r4 $r3 16:31
/drivers/block/paride/
Dfrpw.c101 for (k=0;k<count;k++) buf[k] = r4(); in frpw_read_block_int()
107 for (k=0;k<count-2;k++) buf[k] = r4(); in frpw_read_block_int()
109 buf[count-2] = r4(); in frpw_read_block_int()
110 buf[count-1] = r4(); in frpw_read_block_int()
117 buf[count-2] = r4(); in frpw_read_block_int()
118 buf[count-1] = r4(); in frpw_read_block_int()
124 buf[count-4] = r4(); in frpw_read_block_int()
125 buf[count-3] = r4(); in frpw_read_block_int()
127 buf[count-2] = r4(); in frpw_read_block_int()
128 buf[count-1] = r4(); in frpw_read_block_int()
Dfriq.c104 for (k=0;k<count-2;k++) buf[k] = r4(); in friq_read_block_int()
106 buf[count-2] = r4(); in friq_read_block_int()
107 buf[count-1] = r4(); in friq_read_block_int()
114 buf[count-2] = r4(); in friq_read_block_int()
115 buf[count-1] = r4(); in friq_read_block_int()
121 buf[count-4] = r4(); in friq_read_block_int()
122 buf[count-3] = r4(); in friq_read_block_int()
124 buf[count-2] = r4(); in friq_read_block_int()
125 buf[count-1] = r4(); in friq_read_block_int()
Depat.c90 case 5: w3(r); w2(0x24); a = r4(); w2(4); in epat_read_regr()
140 for(k=0;k<count-1;k++) buf[k] = r4(); in epat_read_block()
141 w2(4); w3(0xa0); w2(0x24); buf[count-1] = r4(); in epat_read_block()
147 buf[count-2] = r4(); in epat_read_block()
148 w2(4); w3(0xa0); w2(0x24); buf[count-1] = r4(); in epat_read_block()
154 for(k=count-4;k<count-1;k++) buf[k] = r4(); in epat_read_block()
155 w2(4); w3(0xa0); w2(0x24); buf[count-1] = r4(); in epat_read_block()
Dfit3.c86 a = r4(); b = r4(); in fit3_read_regr()
127 for (k=0;k<count;k++) buf[k] = r4(); in fit3_read_block()
Dkbic.c68 a = r4(); b = r4(); w2(4); w2(0); w2(4); in kbic_read_regr()
174 for (k=0;k<count;k++) buf[k] = r4(); in kbic_read_block()
Don26.c68 w3(0); w3(0); w2(0x24); a = r4(); w2(4); in on26_read_regr()
69 w2(0x24); (void)r4(); w2(4); in on26_read_regr()
214 for (k=0;k<count;k++) buf[k] = r4(); in on26_read_block()
Dcomm.c64 w2(0x24); h = r4(); w2(4); in comm_read_regr()
130 for (i=0;i<count;i++) buf[i] = r4(); in comm_read_block()
/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/
Dhub.fuc151 shr b32 $r4 $r1 8
152 nv_iowr(NV_PGRAPH_FECS_MMCTX_SAVE_SWBASE, 0, $r4)
153 nv_iowr(NV_PGRAPH_FECS_MMCTX_LOAD_SWBASE, 0, $r4)
176 imm32($r4, 0x502000)
179 add b32 $r14 $r4 0x804
182 add b32 $r14 $r4 0x10c
185 add b32 $r14 $r4 0x104
187 add b32 $r14 $r4 0x100
192 add b32 $r14 $r4 0x800
197 add b32 $r14 $r4 0x804
[all …]
/drivers/soc/bcm/brcmstb/pm/
Ds2-arm.S22 stmfd sp!, {r4-r11, lr}
60 ldmfd sp!, {r4-r11, pc}
/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dramnv50.c510 u32 r0, r4, rt, rblock_size; in nv50_fb_vram_rblock() local
513 r4 = nvkm_rd32(device, 0x100204); in nv50_fb_vram_rblock()
516 r0, r4, rt, nvkm_rd32(device, 0x001540)); in nv50_fb_vram_rblock()
518 colbits = (r4 & 0x0000f000) >> 12; in nv50_fb_vram_rblock()
519 rowbitsa = ((r4 & 0x000f0000) >> 16) + 8; in nv50_fb_vram_rblock()
520 rowbitsb = ((r4 & 0x00f00000) >> 20) + 8; in nv50_fb_vram_rblock()
521 banks = 1 << (((r4 & 0x03000000) >> 24) + 2); in nv50_fb_vram_rblock()
/drivers/infiniband/hw/cxgb4/
Dt4fw_ri_api.h283 __be32 r4[2]; member
293 __be32 r4[2]; member
307 __be32 r4[2]; member
583 __be64 r4; member
670 __be64 r4; member
780 __u8 r4[2]; member
806 __be64 r4; member
/drivers/scsi/csiostor/
Dt4fw_api_stor.h156 __be16 r4; member
228 __be32 r4; member
254 __be32 r4; member
273 u8 r4[4]; member
335 u8 r4; member
/drivers/net/wireless/ralink/rt2x00/
Drt61pci.c537 u8 r4; in rt61pci_config_antenna_5x() local
541 r4 = rt61pci_bbp_read(rt2x00dev, 4); in rt61pci_config_antenna_5x()
551 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2); in rt61pci_config_antenna_5x()
552 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, in rt61pci_config_antenna_5x()
556 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1); in rt61pci_config_antenna_5x()
557 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0); in rt61pci_config_antenna_5x()
565 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1); in rt61pci_config_antenna_5x()
566 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0); in rt61pci_config_antenna_5x()
576 rt61pci_bbp_write(rt2x00dev, 4, r4); in rt61pci_config_antenna_5x()
583 u8 r4; in rt61pci_config_antenna_2x() local
[all …]
Drt73usb.c571 u8 r4; in rt73usb_config_antenna_5x() local
576 r4 = rt73usb_bbp_read(rt2x00dev, 4); in rt73usb_config_antenna_5x()
586 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2); in rt73usb_config_antenna_5x()
589 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, temp); in rt73usb_config_antenna_5x()
592 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1); in rt73usb_config_antenna_5x()
593 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0); in rt73usb_config_antenna_5x()
601 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1); in rt73usb_config_antenna_5x()
602 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0); in rt73usb_config_antenna_5x()
612 rt73usb_bbp_write(rt2x00dev, 4, r4); in rt73usb_config_antenna_5x()
619 u8 r4; in rt73usb_config_antenna_2x() local
[all …]
/drivers/scsi/aacraid/
Dsa.c146 u32 *ret, u32 *r1, u32 *r2, u32 *r3, u32 *r4) in sa_sync_cmd() argument
208 if (r4) in sa_sync_cmd()
209 *r4 = sa_readl(dev, Mailbox4); in sa_sync_cmd()
/drivers/net/wireless/broadcom/b43/
Dradio_2059.c47 #define PHYREGS(r0, r1, r2, r3, r4, r5) \ argument
52 .phy_regs.bw5 = r4, \

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