Searched refs:ref_rate (Results 1 – 6 of 6) sorted by relevance
| /drivers/clk/ti/ |
| D | clkt_dpll.c | 291 unsigned long ref_rate; in omap2_dpll_round_rate() local
304 ref_rate = clk_hw_get_rate(dd->clk_ref); in omap2_dpll_round_rate()
309 scaled_rt_rp = target_rate / (ref_rate / DPLL_SCALE_FACTOR); in omap2_dpll_round_rate()
335 ref_rate); in omap2_dpll_round_rate()
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| /drivers/clk/tegra/ |
| D | clk-dfll.c | 202 #define DVCO_RATE_TO_MULT(rate, ref_rate) ((rate) / ((ref_rate) / 2)) argument
203 #define MULT_TO_DVCO_RATE(mult, ref_rate) ((mult) * ((ref_rate) / 2)) argument
275 unsigned long ref_rate; member
583 div = DIV_ROUND_UP(td->ref_rate, td->pwm_rate); in dfll_pwm_set_output_enabled()
854 val = DVCO_RATE_TO_MULT(rate, td->ref_rate); in dfll_calculate_rate_request()
861 req->dvco_target_rate = MULT_TO_DVCO_RATE(req->mult_bits, td->ref_rate); in dfll_calculate_rate_request()
1236 unsigned long ref_rate) in dfll_calc_monitored_rate() argument
1238 return monitor_data * (ref_rate / REF_CLK_CYC_PER_DVCO_SAMPLE); in dfll_calc_monitored_rate()
1264 pre_scaler_rate = dfll_calc_monitored_rate(v, td->ref_rate); in dfll_read_monitor_rate()
1399 val = DIV_ROUND_UP(td->ref_rate, td->sample_rate * 32); in dfll_set_default_params()
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| /drivers/phy/samsung/ |
| D | phy-samsung-usb2.c | 205 drv->ref_rate = clk_get_rate(drv->ref_clk); in samsung_usb2_phy_probe()
207 ret = drv->cfg->rate_to_clk(drv->ref_rate, &drv->ref_reg_val); in samsung_usb2_phy_probe()
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| D | phy-samsung-usb2.h | 39 unsigned long ref_rate; member
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| D | phy-exynos5-usbdrd.c | 731 unsigned long ref_rate; in exynos5_usbdrd_phy_clk_handle() local
745 ref_rate = clk_get_rate(phy_drd->ref_clk); in exynos5_usbdrd_phy_clk_handle()
747 ret = exynos5_rate_to_clk(ref_rate, &phy_drd->extrefclk); in exynos5_usbdrd_phy_clk_handle()
750 ref_rate); in exynos5_usbdrd_phy_clk_handle()
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| /drivers/clk/nxp/ |
| D | clk-lpc32xx.c | 477 unsigned long rate, cco_rate, ref_rate; in clk_pll_recalc_rate() local
503 ref_rate = parent_rate / clk->n_div; in clk_pll_recalc_rate()
504 rate = cco_rate = ref_rate * clk->m_div; in clk_pll_recalc_rate()
524 && pll_is_valid(ref_rate, 1, 1000000, 27000000))) in clk_pll_recalc_rate()
527 parent_rate, cco_rate, ref_rate); in clk_pll_recalc_rate()
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