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Searched refs:reg_n (Results 1 – 11 of 11) sorted by relevance

/drivers/net/ethernet/samsung/sxgbe/
Dsxgbe_core.c89 unsigned int reg_n) in sxgbe_core_set_umac_addr() argument
96 writel(high_word, ioaddr + SXGBE_CORE_ADD_HIGHOFFSET(reg_n)); in sxgbe_core_set_umac_addr()
97 writel(low_word, ioaddr + SXGBE_CORE_ADD_LOWOFFSET(reg_n)); in sxgbe_core_set_umac_addr()
101 unsigned int reg_n) in sxgbe_core_get_umac_addr() argument
105 high_word = readl(ioaddr + SXGBE_CORE_ADD_HIGHOFFSET(reg_n)); in sxgbe_core_get_umac_addr()
106 low_word = readl(ioaddr + SXGBE_CORE_ADD_LOWOFFSET(reg_n)); in sxgbe_core_get_umac_addr()
Dsxgbe_common.h333 unsigned int reg_n);
335 unsigned int reg_n);
Dsxgbe_main.c1812 unsigned int reg_n) in sxgbe_set_umac_addr() argument
1821 writel(data | SXGBE_HI_REG_AE, ioaddr + SXGBE_ADDR_HIGH(reg_n)); in sxgbe_set_umac_addr()
1823 writel(data, ioaddr + SXGBE_ADDR_LOW(reg_n)); in sxgbe_set_umac_addr()
/drivers/input/keyboard/
Dbcm-keypad.c59 #define KPSSRN_OFFSET(reg_n) (KPSSR0_OFFSET + 4 * (reg_n)) argument
64 #define KPICRN_OFFSET(reg_n) (KPICR0_OFFSET + 4 * (reg_n)) argument
72 #define BIT_TO_ROW_SSRN(bit_nr, reg_n) (((bit_nr) >> 3) + 4 * (reg_n)) argument
/drivers/net/ethernet/stmicro/stmmac/
Ddwmac1000_core.c107 unsigned int reg_n) in dwmac1000_set_umac_addr() argument
110 stmmac_set_mac_addr(ioaddr, addr, GMAC_ADDR_HIGH(reg_n), in dwmac1000_set_umac_addr()
111 GMAC_ADDR_LOW(reg_n)); in dwmac1000_set_umac_addr()
116 unsigned int reg_n) in dwmac1000_get_umac_addr() argument
119 stmmac_get_mac_addr(ioaddr, addr, GMAC_ADDR_HIGH(reg_n), in dwmac1000_get_umac_addr()
120 GMAC_ADDR_LOW(reg_n)); in dwmac1000_get_umac_addr()
Ddwmac-sun8i.c583 unsigned int reg_n) in sun8i_dwmac_set_umac_addr() argument
589 writel(0, ioaddr + EMAC_MACADDR_HI(reg_n)); in sun8i_dwmac_set_umac_addr()
593 stmmac_set_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n), in sun8i_dwmac_set_umac_addr()
594 EMAC_MACADDR_LO(reg_n)); in sun8i_dwmac_set_umac_addr()
595 if (reg_n > 0) { in sun8i_dwmac_set_umac_addr()
596 v = readl(ioaddr + EMAC_MACADDR_HI(reg_n)); in sun8i_dwmac_set_umac_addr()
598 writel(v, ioaddr + EMAC_MACADDR_HI(reg_n)); in sun8i_dwmac_set_umac_addr()
604 unsigned int reg_n) in sun8i_dwmac_get_umac_addr() argument
608 stmmac_get_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n), in sun8i_dwmac_get_umac_addr()
609 EMAC_MACADDR_LO(reg_n)); in sun8i_dwmac_get_umac_addr()
Ddwmac100_core.c72 unsigned int reg_n) in dwmac100_set_umac_addr() argument
80 unsigned int reg_n) in dwmac100_get_umac_addr() argument
Ddwmac4_core.c321 unsigned char *addr, unsigned int reg_n) in dwmac4_set_umac_addr() argument
325 stmmac_dwmac4_set_mac_addr(ioaddr, addr, GMAC_ADDR_HIGH(reg_n), in dwmac4_set_umac_addr()
326 GMAC_ADDR_LOW(reg_n)); in dwmac4_set_umac_addr()
330 unsigned char *addr, unsigned int reg_n) in dwmac4_get_umac_addr() argument
334 stmmac_dwmac4_get_mac_addr(ioaddr, addr, GMAC_ADDR_HIGH(reg_n), in dwmac4_get_umac_addr()
335 GMAC_ADDR_LOW(reg_n)); in dwmac4_get_umac_addr()
Ddwxgmac2_core.c337 unsigned char *addr, unsigned int reg_n) in dwxgmac2_set_umac_addr() argument
343 writel(value | XGMAC_AE, ioaddr + XGMAC_ADDRx_HIGH(reg_n)); in dwxgmac2_set_umac_addr()
346 writel(value, ioaddr + XGMAC_ADDRx_LOW(reg_n)); in dwxgmac2_set_umac_addr()
350 unsigned char *addr, unsigned int reg_n) in dwxgmac2_get_umac_addr() argument
356 hi_addr = readl(ioaddr + XGMAC_ADDRx_HIGH(reg_n)); in dwxgmac2_get_umac_addr()
357 lo_addr = readl(ioaddr + XGMAC_ADDRx_LOW(reg_n)); in dwxgmac2_get_umac_addr()
Dhwif.h324 unsigned int reg_n);
326 unsigned int reg_n);
/drivers/net/ethernet/hisilicon/
Dhisi_femac.c567 unsigned int reg_n, bool enable) in hisi_femac_enable_hw_addr_filter() argument
571 val = readl(priv->glb_base + GLB_MAC_H16(reg_n)); in hisi_femac_enable_hw_addr_filter()
576 writel(val, priv->glb_base + GLB_MAC_H16(reg_n)); in hisi_femac_enable_hw_addr_filter()
581 unsigned int reg_n) in hisi_femac_set_hw_addr_filter() argument
586 high = GLB_MAC_H16(reg_n); in hisi_femac_set_hw_addr_filter()
587 low = GLB_MAC_L32(reg_n); in hisi_femac_set_hw_addr_filter()