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Searched refs:regnum (Results 1 – 25 of 73) sorted by relevance

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/drivers/net/phy/
Dmdio-cavium.c29 int phy_id, int regnum) in cavium_mdiobus_c45_addr() argument
38 smi_wr.s.dat = regnum & 0xffff; in cavium_mdiobus_c45_addr()
41 regnum = (regnum >> 16) & 0x1f; in cavium_mdiobus_c45_addr()
46 smi_cmd.s.reg_adr = regnum; in cavium_mdiobus_c45_addr()
62 int cavium_mdiobus_read(struct mii_bus *bus, int phy_id, int regnum) in cavium_mdiobus_read() argument
70 if (regnum & MII_ADDR_C45) { in cavium_mdiobus_read()
71 int r = cavium_mdiobus_c45_addr(p, phy_id, regnum); in cavium_mdiobus_read()
76 regnum = (regnum >> 16) & 0x1f; in cavium_mdiobus_read()
85 smi_cmd.s.reg_adr = regnum; in cavium_mdiobus_read()
103 int cavium_mdiobus_write(struct mii_bus *bus, int phy_id, int regnum, u16 val) in cavium_mdiobus_write() argument
[all …]
Dphy-core.c353 u16 regnum) in mmd_phy_indirect() argument
359 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, regnum); in mmd_phy_indirect()
375 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) in __phy_read_mmd() argument
379 if (regnum > (u16)~0 || devad > 32) in __phy_read_mmd()
383 val = phydev->drv->read_mmd(phydev, devad, regnum); in __phy_read_mmd()
385 u32 addr = MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff); in __phy_read_mmd()
392 mmd_phy_indirect(bus, phy_addr, devad, regnum); in __phy_read_mmd()
410 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) in phy_read_mmd() argument
415 ret = __phy_read_mmd(phydev, devad, regnum); in phy_read_mmd()
432 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) in __phy_write_mmd() argument
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Dmdio-aspeed.c42 static int aspeed_mdio_read(struct mii_bus *bus, int addr, int regnum) in aspeed_mdio_read() argument
50 regnum); in aspeed_mdio_read()
53 if (regnum & MII_ADDR_C45) in aspeed_mdio_read()
60 | FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, regnum); in aspeed_mdio_read()
74 static int aspeed_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val) in aspeed_mdio_write() argument
80 __func__, addr, regnum, val); in aspeed_mdio_write()
83 if (regnum & MII_ADDR_C45) in aspeed_mdio_write()
90 | FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, regnum) in aspeed_mdio_write()
Drealtek.c269 static int rtlgen_read_mmd(struct phy_device *phydev, int devnum, u16 regnum) in rtlgen_read_mmd() argument
273 if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) { in rtlgen_read_mmd()
277 } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) { in rtlgen_read_mmd()
281 } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE) { in rtlgen_read_mmd()
292 static int rtlgen_write_mmd(struct phy_device *phydev, int devnum, u16 regnum, in rtlgen_write_mmd() argument
297 if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) { in rtlgen_write_mmd()
308 static int rtl8125_read_mmd(struct phy_device *phydev, int devnum, u16 regnum) in rtl8125_read_mmd() argument
310 int ret = rtlgen_read_mmd(phydev, devnum, regnum); in rtl8125_read_mmd()
315 if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2) { in rtl8125_read_mmd()
319 } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) { in rtl8125_read_mmd()
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Dmdio_bus.c549 int __mdiobus_read(struct mii_bus *bus, int addr, u32 regnum) in __mdiobus_read() argument
555 retval = bus->read(bus, addr, regnum); in __mdiobus_read()
557 trace_mdio_access(bus, 1, addr, regnum, retval, retval); in __mdiobus_read()
574 int __mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val) in __mdiobus_write() argument
580 err = bus->write(bus, addr, regnum, val); in __mdiobus_write()
582 trace_mdio_access(bus, 0, addr, regnum, val, err); in __mdiobus_write()
601 int mdiobus_read_nested(struct mii_bus *bus, int addr, u32 regnum) in mdiobus_read_nested() argument
608 retval = __mdiobus_read(bus, addr, regnum); in mdiobus_read_nested()
625 int mdiobus_read(struct mii_bus *bus, int addr, u32 regnum) in mdiobus_read() argument
632 retval = __mdiobus_read(bus, addr, regnum); in mdiobus_read()
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Dmdio-hisi-femac.c36 static int hisi_femac_mdio_read(struct mii_bus *bus, int mii_id, int regnum) in hisi_femac_mdio_read() argument
45 writel((mii_id << BIT_PHY_ADDR_OFFSET) | regnum, in hisi_femac_mdio_read()
55 static int hisi_femac_mdio_write(struct mii_bus *bus, int mii_id, int regnum, in hisi_femac_mdio_write() argument
66 (mii_id << BIT_PHY_ADDR_OFFSET) | regnum, in hisi_femac_mdio_write()
Dmdio-sun4i.c36 static int sun4i_mdio_read(struct mii_bus *bus, int mii_id, int regnum) in sun4i_mdio_read() argument
43 writel((mii_id << 8) | regnum, data->membase + EMAC_MAC_MADR_REG); in sun4i_mdio_read()
63 static int sun4i_mdio_write(struct mii_bus *bus, int mii_id, int regnum, in sun4i_mdio_write() argument
70 writel((mii_id << 8) | regnum, data->membase + EMAC_MAC_MADR_REG); in sun4i_mdio_write()
Dmdio-moxart.c34 static int moxart_mdio_read(struct mii_bus *bus, int mii_id, int regnum) in moxart_mdio_read() argument
43 ((regnum << 21) & REGAD_MASK); in moxart_mdio_read()
63 int regnum, u16 value) in moxart_mdio_write() argument
72 ((regnum << 21) & REGAD_MASK); in moxart_mdio_write()
Dmdio-mscc-miim.c54 static int mscc_miim_read(struct mii_bus *bus, int mii_id, int regnum) in mscc_miim_read() argument
65 (regnum << MSCC_MIIM_CMD_REGAD_SHIFT) | MSCC_MIIM_CMD_OPR_READ, in mscc_miim_read()
84 int regnum, u16 value) in mscc_miim_write() argument
94 (regnum << MSCC_MIIM_CMD_REGAD_SHIFT) | in mscc_miim_write()
Dmdio-mux.c38 static int mdio_mux_read(struct mii_bus *bus, int phy_id, int regnum) in mdio_mux_read() argument
51 r = pb->mii_bus->read(pb->mii_bus, phy_id, regnum); in mdio_mux_read()
62 int regnum, u16 val) in mdio_mux_write() argument
76 r = pb->mii_bus->write(pb->mii_bus, phy_id, regnum, val); in mdio_mux_write()
Dbcm87xx.c58 u32 regnum = MII_ADDR_C45 | (devid << 16) | reg; in bcm87xx_of_reg_init() local
61 val = phy_read(phydev, regnum); in bcm87xx_of_reg_init()
70 ret = phy_write(phydev, regnum, val); in bcm87xx_of_reg_init()
/drivers/net/ethernet/freescale/enetc/
Denetc_mdio.c46 int enetc_mdio_write(struct mii_bus *bus, int phy_id, int regnum, u16 value) in enetc_mdio_write() argument
55 if (regnum & MII_ADDR_C45) { in enetc_mdio_write()
56 dev_addr = (regnum >> 16) & 0x1f; in enetc_mdio_write()
60 dev_addr = regnum & 0x1f; in enetc_mdio_write()
75 if (regnum & MII_ADDR_C45) { in enetc_mdio_write()
76 enetc_mdio_wr(hw, MDIO_ADDR, regnum & 0xffff); in enetc_mdio_write()
93 int enetc_mdio_read(struct mii_bus *bus, int phy_id, int regnum) in enetc_mdio_read() argument
102 if (regnum & MII_ADDR_C45) { in enetc_mdio_read()
103 dev_addr = (regnum >> 16) & 0x1f; in enetc_mdio_read()
106 dev_addr = regnum & 0x1f; in enetc_mdio_read()
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Denetc_mdio.h11 int enetc_mdio_write(struct mii_bus *bus, int phy_id, int regnum, u16 value);
12 int enetc_mdio_read(struct mii_bus *bus, int phy_id, int regnum);
/drivers/net/ethernet/freescale/
Dxgmac_mdio.c128 static int xgmac_mdio_write(struct mii_bus *bus, int phy_id, int regnum, u16 value) in xgmac_mdio_write() argument
138 if (regnum & MII_ADDR_C45) { in xgmac_mdio_write()
140 dev_addr = (regnum >> 16) & 0x1f; in xgmac_mdio_write()
144 dev_addr = regnum & 0x1f; in xgmac_mdio_write()
159 if (regnum & MII_ADDR_C45) { in xgmac_mdio_write()
160 xgmac_write32(regnum & 0xffff, &regs->mdio_addr, endian); in xgmac_mdio_write()
182 static int xgmac_mdio_read(struct mii_bus *bus, int phy_id, int regnum) in xgmac_mdio_read() argument
194 if (regnum & MII_ADDR_C45) { in xgmac_mdio_read()
195 dev_addr = (regnum >> 16) & 0x1f; in xgmac_mdio_read()
198 dev_addr = regnum & 0x1f; in xgmac_mdio_read()
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Dfsl_pq_mdio.c96 static int fsl_pq_mdio_write(struct mii_bus *bus, int mii_id, int regnum, in fsl_pq_mdio_write() argument
104 iowrite32be((mii_id << 8) | regnum, &regs->miimadd); in fsl_pq_mdio_write()
129 static int fsl_pq_mdio_read(struct mii_bus *bus, int mii_id, int regnum) in fsl_pq_mdio_read() argument
137 iowrite32be((mii_id << 8) | regnum, &regs->miimadd); in fsl_pq_mdio_read()
157 dev_dbg(&bus->dev, "read %04x from address %x/%x\n", value, mii_id, regnum); in fsl_pq_mdio_read()
/drivers/net/ethernet/marvell/
Dmvmdio.c141 int regnum) in orion_mdio_smi_read() argument
147 if (regnum & MII_ADDR_C45) in orion_mdio_smi_read()
155 (regnum << MVMDIO_SMI_PHY_REG_SHIFT) | in orion_mdio_smi_read()
173 int regnum, u16 value) in orion_mdio_smi_write() argument
178 if (regnum & MII_ADDR_C45) in orion_mdio_smi_write()
186 (regnum << MVMDIO_SMI_PHY_REG_SHIFT) | in orion_mdio_smi_write()
206 int regnum) in orion_mdio_xsmi_read() argument
209 u16 dev_addr = (regnum >> 16) & GENMASK(4, 0); in orion_mdio_xsmi_read()
212 if (!(regnum & MII_ADDR_C45)) in orion_mdio_xsmi_read()
219 writel(regnum & GENMASK(15, 0), dev->regs + MVMDIO_XSMI_ADDR_REG); in orion_mdio_xsmi_read()
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/drivers/net/dsa/
Dlan9303-core.c265 static int lan9303_virt_phy_reg_read(struct lan9303 *chip, int regnum) in lan9303_virt_phy_reg_read() argument
270 if (regnum > MII_EXPANSION) in lan9303_virt_phy_reg_read()
273 ret = lan9303_read(chip->regmap, LAN9303_VIRT_PHY_BASE + regnum, &val); in lan9303_virt_phy_reg_read()
280 static int lan9303_virt_phy_reg_write(struct lan9303 *chip, int regnum, u16 val) in lan9303_virt_phy_reg_write() argument
282 if (regnum > MII_EXPANSION) in lan9303_virt_phy_reg_write()
285 return regmap_write(chip->regmap, LAN9303_VIRT_PHY_BASE + regnum, val); in lan9303_virt_phy_reg_write()
294 static int lan9303_indirect_phy_read(struct lan9303 *chip, int addr, int regnum) in lan9303_indirect_phy_read() argument
300 val |= LAN9303_PMI_ACCESS_MIIRINDA(regnum); in lan9303_indirect_phy_read()
332 int regnum, u16 val) in lan9303_indirect_phy_write() argument
338 reg |= LAN9303_PMI_ACCESS_MIIRINDA(regnum); in lan9303_indirect_phy_write()
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Dqca8k.c91 qca8k_mii_read32(struct mii_bus *bus, int phy_id, u32 regnum) in qca8k_mii_read32() argument
96 ret = bus->read(bus, phy_id, regnum); in qca8k_mii_read32()
99 ret = bus->read(bus, phy_id, regnum + 1); in qca8k_mii_read32()
113 qca8k_mii_write32(struct mii_bus *bus, int phy_id, u32 regnum, u32 val) in qca8k_mii_write32() argument
121 ret = bus->write(bus, phy_id, regnum, lo); in qca8k_mii_write32()
123 ret = bus->write(bus, phy_id, regnum + 1, hi); in qca8k_mii_write32()
501 qca8k_mdio_write(struct qca8k_priv *priv, int port, u32 regnum, u16 data) in qca8k_mdio_write() argument
505 if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) in qca8k_mdio_write()
514 QCA8K_MDIO_MASTER_REG_ADDR(regnum) | in qca8k_mdio_write()
524 qca8k_mdio_read(struct qca8k_priv *priv, int port, u32 regnum) in qca8k_mdio_read() argument
[all …]
Dmv88e6060.c221 static int mv88e6060_phy_read(struct dsa_switch *ds, int port, int regnum) in mv88e6060_phy_read() argument
230 return reg_read(priv, addr, regnum); in mv88e6060_phy_read()
234 mv88e6060_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) in mv88e6060_phy_write() argument
243 return reg_write(priv, addr, regnum, val); in mv88e6060_phy_write()
/drivers/net/ethernet/qualcomm/emac/
Demac-phy.c44 static int emac_mdio_read(struct mii_bus *bus, int addr, int regnum) in emac_mdio_read() argument
54 ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) | in emac_mdio_read()
67 static int emac_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val) in emac_mdio_write() argument
77 ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) | in emac_mdio_write()
/drivers/net/usb/
Dnet1080.c96 nc_vendor_read(struct usbnet *dev, u8 req, u8 regnum, u16 *retval_ptr) in nc_vendor_read() argument
101 0, regnum, retval_ptr, in nc_vendor_read()
111 nc_register_read(struct usbnet *dev, u8 regnum, u16 *retval_ptr) in nc_register_read() argument
113 return nc_vendor_read(dev, REQUEST_REGISTER, regnum, retval_ptr); in nc_register_read()
118 nc_vendor_write(struct usbnet *dev, u8 req, u8 regnum, u16 value) in nc_vendor_write() argument
122 value, regnum, NULL, 0); in nc_vendor_write()
126 nc_register_write(struct usbnet *dev, u8 regnum, u16 value) in nc_register_write() argument
128 nc_vendor_write(dev, REQUEST_REGISTER, regnum, value); in nc_register_write()
/drivers/net/ethernet/hisilicon/
Dhns_mdio.c218 int phy_id, int regnum, u16 data) in hns_mdio_write() argument
222 u8 devad = ((regnum >> 16) & 0x1f); in hns_mdio_write()
223 u8 is_c45 = !!(regnum & MII_ADDR_C45); in hns_mdio_write()
224 u16 reg = (u16)(regnum & 0xffff); in hns_mdio_write()
280 static int hns_mdio_read(struct mii_bus *bus, int phy_id, int regnum) in hns_mdio_read() argument
284 u8 devad = ((regnum >> 16) & 0x1f); in hns_mdio_read()
285 u8 is_c45 = !!(regnum & MII_ADDR_C45); in hns_mdio_read()
286 u16 reg = (u16)(regnum & 0xffff); in hns_mdio_read()
/drivers/net/ethernet/hisilicon/hns3/hns3pf/
Dhclge_mdio.c42 static int hclge_mdio_write(struct mii_bus *bus, int phyid, int regnum, in hclge_mdio_write() argument
60 HCLGE_MDIO_PHYREG_S, (u32)regnum); in hclge_mdio_write()
81 static int hclge_mdio_read(struct mii_bus *bus, int phyid, int regnum) in hclge_mdio_read() argument
98 HCLGE_MDIO_PHYREG_S, (u32)regnum); in hclge_mdio_read()
/drivers/net/ethernet/broadcom/
Dbgmac-bcma-mdio.c199 static int bcma_mdio_mii_read(struct mii_bus *bus, int mii_id, int regnum) in bcma_mdio_mii_read() argument
201 return bcma_mdio_phy_read(bus->priv, mii_id, regnum); in bcma_mdio_mii_read()
204 static int bcma_mdio_mii_write(struct mii_bus *bus, int mii_id, int regnum, in bcma_mdio_mii_write() argument
207 return bcma_mdio_phy_write(bus->priv, mii_id, regnum, value); in bcma_mdio_mii_write()
/drivers/staging/netlogic/
Dxlr_net.c597 static int xlr_phy_write(u32 *base_addr, int phy_addr, int regnum, u16 val) in xlr_phy_write() argument
607 xlr_nae_wreg(base_addr, R_MII_MGMT_ADDRESS, (phy_addr << 8) | regnum); in xlr_phy_write()
627 static int xlr_phy_read(u32 *base_addr, int phy_addr, int regnum) in xlr_phy_read() argument
639 (phy_addr << 8) | (regnum << 0)); in xlr_phy_read()
664 static int xlr_mii_write(struct mii_bus *bus, int phy_addr, int regnum, u16 val) in xlr_mii_write() argument
669 ret = xlr_phy_write(priv->mii_addr, phy_addr, regnum, val); in xlr_mii_write()
671 phy_addr, regnum, val, ret); in xlr_mii_write()
675 static int xlr_mii_read(struct mii_bus *bus, int phy_addr, int regnum) in xlr_mii_read() argument
680 ret = xlr_phy_read(priv->mii_addr, phy_addr, regnum); in xlr_mii_read()
682 phy_addr, regnum, ret); in xlr_mii_read()

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