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Searched refs:ro (Results 1 – 25 of 54) sorted by relevance

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/drivers/pci/
Dpci-bridge-emul.c29 u32 ro; member
42 [PCI_VENDOR_ID / 4] = { .ro = ~0 },
47 .ro = ((PCI_COMMAND_SPECIAL | PCI_COMMAND_INVALIDATE |
60 [PCI_CLASS_REVISION / 4] = { .ro = ~0 },
78 [PCI_CACHE_LINE_SIZE / 4] = { .ro = ~0 },
84 [PCI_BASE_ADDRESS_0 / 4] = { .ro = ~0 },
85 [PCI_BASE_ADDRESS_1 / 4] = { .ro = ~0 },
91 .ro = GENMASK(31, 24),
99 .ro = (((PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK |
118 .ro = GENMASK(19, 16) | GENMASK(3, 0),
[all …]
/drivers/usb/gadget/function/
Dstorage_common.c180 int ro; in fsg_lun_open() local
191 ro = curlun->initially_ro; in fsg_lun_open()
192 if (!ro) { in fsg_lun_open()
195 ro = 1; in fsg_lun_open()
197 if (ro) in fsg_lun_open()
205 ro = 1; in fsg_lun_open()
222 ro = 1; in fsg_lun_open()
264 curlun->ro = ro; in fsg_lun_open()
288 if (curlun->ro || !filp) in fsg_lun_fsync_sub()
319 ? curlun->ro in fsg_show_ro()
[all …]
Df_mass_storage.h10 bool ro[FSG_MAX_LUNS]; member
35 _FSG_MODULE_PARAM_ARRAY(prefix, params, ro, bool, \
89 char ro; member
Df_mass_storage.c759 if (curlun->ro) { in do_write()
1243 buf[2] = (curlun->ro ? 0x80 : 0x00); /* WP, DPOFUA */ in do_mode_sense()
1247 buf[3] = (curlun->ro ? 0x80 : 0x00); /* WP, DPOFUA */ in do_mode_sense()
2557 static DEVICE_ATTR(ro, 0, ro_show, ro_store);
2764 lun->ro = cfg->cdrom || cfg->ro; in fsg_common_create_lun()
2765 lun->initially_ro = lun->ro; in fsg_common_create_lun()
2807 lun->ro ? "read only " : "", in fsg_common_create_lun()
3065 CONFIGFS_ATTR(fsg_lun_opts_, ro);
3456 lun->ro = !!params->ro[i]; in fsg_config_from_params()
/drivers/gpu/drm/
Ddrm_crtc_helper.c510 int count = 0, ro, fail = 0; in drm_crtc_helper_set_config() local
612 for (ro = 0; ro < set->num_connectors; ro++) { in drm_crtc_helper_set_config()
613 if (set->connectors[ro]->encoder) in drm_crtc_helper_set_config()
615 drm_connector_get(set->connectors[ro]); in drm_crtc_helper_set_config()
625 for (ro = 0; ro < set->num_connectors; ro++) { in drm_crtc_helper_set_config()
626 if (set->connectors[ro] == connector) { in drm_crtc_helper_set_config()
672 for (ro = 0; ro < set->num_connectors; ro++) { in drm_crtc_helper_set_config()
673 if (set->connectors[ro] == connector) in drm_crtc_helper_set_config()
761 for (ro = 0; ro < set->num_connectors; ro++) { in drm_crtc_helper_set_config()
762 if (set->connectors[ro]->encoder) in drm_crtc_helper_set_config()
[all …]
/drivers/mtd/nand/raw/atmel/
Dpmecc.c505 int ro; in atmel_pmecc_get_sigma() local
573 ro = 0; in atmel_pmecc_get_sigma()
579 ro = j; in atmel_pmecc_get_sigma()
584 diff = (mu[i] - mu[ro]); in atmel_pmecc_get_sigma()
587 if ((lmu[i] >> 1) > ((lmu[ro] >> 1) + diff)) in atmel_pmecc_get_sigma()
590 lmu[i + 1] = ((lmu[ro] >> 1) + diff) * 2; in atmel_pmecc_get_sigma()
597 for (k = 0; k <= lmu[ro] >> 1; k++) { in atmel_pmecc_get_sigma()
600 if (!(smu[ro * num + k] && dmu[i])) in atmel_pmecc_get_sigma()
604 b = index_of[dmu[ro]]; in atmel_pmecc_get_sigma()
605 c = index_of[smu[ro * num + k]]; in atmel_pmecc_get_sigma()
/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
Dvmmnv50.c238 u8 aper, kind, comp, priv, ro; in nv50_vmm_valid() local
246 ro = !!args->v0.ro; in nv50_vmm_valid()
252 ro = 0; in nv50_vmm_valid()
317 map->type |= (u64)ro << 3; in nv50_vmm_valid()
Dvmmgf100.c250 u8 kind, priv, ro, vol; in gf100_vmm_valid() local
259 ro = !!args->v0.ro; in gf100_vmm_valid()
265 ro = 0; in gf100_vmm_valid()
315 map->type |= (u64) ro << 2; in gf100_vmm_valid()
Dmemnv50.c48 uvmm.ro = args->v0.ro; in nv50_mem_map()
Dmemgf100.c47 uvmm.ro = args->v0.ro; in gf100_mem_map()
Dvmmgp100.c323 u8 kind, priv, ro, vol; in gp100_vmm_valid() local
332 ro = !!args->v0.ro; in gp100_vmm_valid()
338 ro = 0; in gp100_vmm_valid()
385 map->type |= (u64) ro << 6; in gp100_vmm_valid()
/drivers/nvdimm/
Dregion_devs.c544 return sprintf(buf, "%d\n", nd_region->ro); in read_only_show()
550 bool ro; in read_only_store() local
551 int rc = strtobool(buf, &ro); in read_only_store()
557 nd_region->ro = ro; in read_only_store()
941 int ro = 0; in nd_region_create() local
955 ro = 1; in nd_region_create()
1022 nd_region->ro = ro; in nd_region_create()
/drivers/md/
Dmd.c390 if (mddev->ro == 1 && unlikely(rw == WRITE)) { in md_make_request()
2555 if (mddev->ro) { in md_update_sb()
3815 if (mddev->ro) in level_store()
4019 else if (mddev->ro) in layout_store()
4120 else if (mddev->ro) in chunk_size_store()
4243 switch(mddev->ro) { in array_state_show()
4276 static int do_md_stop(struct mddev *mddev, int ro, struct block_device *bdev);
4287 if (mddev->pers && (st == active || st == clean) && mddev->ro != 1) { in array_state_store()
4331 mddev->ro = 1; in array_state_store()
4338 if (mddev->ro == 0) in array_state_store()
[all …]
/drivers/gpu/drm/nouveau/include/nvif/
Dif900d.h17 __u8 ro; member
Dif500d.h16 __u8 ro; member
Dif900b.h20 __u8 ro; member
Difb00d.h23 __u8 ro; member
Dif500b.h21 __u8 ro; member
Difc00d.h23 __u8 ro; member
/drivers/mmc/core/
Dsd.c829 int ro; in mmc_sd_get_ro() local
842 ro = host->ops->get_ro(host); in mmc_sd_get_ro()
844 return ro; in mmc_sd_get_ro()
898 int ro = mmc_sd_get_ro(host); in mmc_sd_setup_card() local
900 if (ro < 0) { in mmc_sd_setup_card()
903 } else if (ro > 0) { in mmc_sd_setup_card()
/drivers/hwmon/
Dibmaem.c909 const struct aem_ro_sensor_template *ro, in aem_register_sensors() argument
917 while (ro->label) { in aem_register_sensors()
919 sensors->dev_attr.attr.name = ro->label; in aem_register_sensors()
921 sensors->dev_attr.show = ro->show; in aem_register_sensors()
922 sensors->index = ro->index; in aem_register_sensors()
930 ro++; in aem_register_sensors()
/drivers/gpu/drm/nouveau/
Dnouveau_mem.c52 args.nv50.ro = 0; in nouveau_mem_map()
66 args.gf100.ro = 0; in nouveau_mem_map()
/drivers/gpu/drm/etnaviv/
Detnaviv_gem.h20 bool ro; member
/drivers/net/ethernet/chelsio/cxgb/
Dpm3393.c437 if (ro & \
445 u64 ro; in pm3393_update_statistics() local
457 ro = ((u64)val0 & 0xffff) | (((u64)val1 & 0xffff) << 16) | in pm3393_update_statistics()
/drivers/mtd/parsers/
DKconfig40 <partdef> := <size>[@offset][<name>][ro]
56 mtdparts=sa1100:256k(ARMboot)ro,-(root)

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