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Searched refs:rq_regs_c (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubp.c139 CHUNK_SIZE_C, rq_regs->rq_regs_c.chunk_size, in hubp21_program_requestor()
140 MIN_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_chunk_size, in hubp21_program_requestor()
141 META_CHUNK_SIZE_C, rq_regs->rq_regs_c.meta_chunk_size, in hubp21_program_requestor()
142 MIN_META_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_meta_chunk_size, in hubp21_program_requestor()
143 DPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.dpte_group_size, in hubp21_program_requestor()
144 SWATH_HEIGHT_C, rq_regs->rq_regs_c.swath_height, in hubp21_program_requestor()
145 PTE_ROW_HEIGHT_LINEAR_C, rq_regs->rq_regs_c.pte_row_height_linear); in hubp21_program_requestor()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hubp.c565 CHUNK_SIZE_C, rq_regs->rq_regs_c.chunk_size, in hubp1_program_requestor()
566 MIN_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_chunk_size, in hubp1_program_requestor()
567 META_CHUNK_SIZE_C, rq_regs->rq_regs_c.meta_chunk_size, in hubp1_program_requestor()
568 MIN_META_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_meta_chunk_size, in hubp1_program_requestor()
569 DPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.dpte_group_size, in hubp1_program_requestor()
570 MPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.mpte_group_size, in hubp1_program_requestor()
571 SWATH_HEIGHT_C, rq_regs->rq_regs_c.swath_height, in hubp1_program_requestor()
572 PTE_ROW_HEIGHT_LINEAR_C, rq_regs->rq_regs_c.pte_row_height_linear); in hubp1_program_requestor()
1037 CHUNK_SIZE_C, &rq_regs->rq_regs_c.chunk_size, in hubp1_read_state()
1038 MIN_CHUNK_SIZE_C, &rq_regs->rq_regs_c.min_chunk_size, in hubp1_read_state()
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Ddcn10_hw_sequencer_debug.c217 …rq_regs->rq_regs_l.pte_row_height_linear, rq_regs->rq_regs_c.chunk_size, rq_regs->rq_regs_c.min_ch… in dcn10_get_rq_states()
218 rq_regs->rq_regs_c.meta_chunk_size, rq_regs->rq_regs_c.min_meta_chunk_size, in dcn10_get_rq_states()
219 rq_regs->rq_regs_c.dpte_group_size, rq_regs->rq_regs_c.mpte_group_size, in dcn10_get_rq_states()
220 rq_regs->rq_regs_c.swath_height, rq_regs->rq_regs_c.pte_row_height_linear); in dcn10_get_rq_states()
Ddcn10_hw_sequencer.c178 …rq_regs->rq_regs_l.pte_row_height_linear, rq_regs->rq_regs_c.chunk_size, rq_regs->rq_regs_c.min_ch… in dcn10_log_hubp_states()
179 rq_regs->rq_regs_c.meta_chunk_size, rq_regs->rq_regs_c.min_meta_chunk_size, in dcn10_log_hubp_states()
180 rq_regs->rq_regs_c.dpte_group_size, rq_regs->rq_regs_c.mpte_group_size, in dcn10_log_hubp_states()
181 rq_regs->rq_regs_c.swath_height, rq_regs->rq_regs_c.pte_row_height_linear); in dcn10_log_hubp_states()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hubp.c213 CHUNK_SIZE_C, rq_regs->rq_regs_c.chunk_size, in hubp2_program_requestor()
214 MIN_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_chunk_size, in hubp2_program_requestor()
215 META_CHUNK_SIZE_C, rq_regs->rq_regs_c.meta_chunk_size, in hubp2_program_requestor()
216 MIN_META_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_meta_chunk_size, in hubp2_program_requestor()
217 DPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.dpte_group_size, in hubp2_program_requestor()
218 MPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.mpte_group_size, in hubp2_program_requestor()
219 SWATH_HEIGHT_C, rq_regs->rq_regs_c.swath_height, in hubp2_program_requestor()
220 PTE_ROW_HEIGHT_LINEAR_C, rq_regs->rq_regs_c.pte_row_height_linear); in hubp2_program_requestor()
1235 CHUNK_SIZE_C, &rq_regs->rq_regs_c.chunk_size, in hubp2_read_state()
1236 MIN_CHUNK_SIZE_C, &rq_regs->rq_regs_c.min_chunk_size, in hubp2_read_state()
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/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_rq_dlg_helpers.c185 print__data_rq_regs_st(mode_lib, rq_regs.rq_regs_c); in print__rq_regs_st()
Ddisplay_mode_structs.h496 display_data_rq_regs_st rq_regs_c; member
Ddml1_display_rq_dlg_calc.c241 extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c); in dml1_extract_rq_regs()
244 rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height); in dml1_extract_rq_regs()
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20v2.c202 extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c); in extract_rq_regs()
203 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param.dlg.rq_c.dpte_row_height), in extract_rq_regs()
208 rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height); in extract_rq_regs()
Ddisplay_rq_dlg_calc_20.c202 extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c); in extract_rq_regs()
203 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param.dlg.rq_c.dpte_row_height), in extract_rq_regs()
208 rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height); in extract_rq_regs()
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.c182 extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c); in extract_rq_regs()
183 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor( in extract_rq_regs()
189 rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height); in extract_rq_regs()