/drivers/net/ethernet/mellanox/mlx4/ |
D | srq.c | 43 void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type) in mlx4_srq_event() argument 49 srq = radix_tree_lookup(&srq_table->tree, srqn & (dev->caps.num_srqs - 1)); in mlx4_srq_event() 54 mlx4_warn(dev, "Async event for bogus SRQ %08x\n", srqn); in mlx4_srq_event() 93 int __mlx4_srq_alloc_icm(struct mlx4_dev *dev, int *srqn) in __mlx4_srq_alloc_icm() argument 99 *srqn = mlx4_bitmap_alloc(&srq_table->bitmap); in __mlx4_srq_alloc_icm() 100 if (*srqn == -1) in __mlx4_srq_alloc_icm() 103 err = mlx4_table_get(dev, &srq_table->table, *srqn); in __mlx4_srq_alloc_icm() 107 err = mlx4_table_get(dev, &srq_table->cmpt_table, *srqn); in __mlx4_srq_alloc_icm() 113 mlx4_table_put(dev, &srq_table->table, *srqn); in __mlx4_srq_alloc_icm() 116 mlx4_bitmap_free(&srq_table->bitmap, *srqn, MLX4_NO_RR); in __mlx4_srq_alloc_icm() [all …]
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D | resource_tracker.c | 1973 int srqn; in srq_alloc_res() local 1982 err = __mlx4_srq_alloc_icm(dev, &srqn); in srq_alloc_res() 1988 err = add_res_range(dev, slave, srqn, 1, RES_SRQ, 0); in srq_alloc_res() 1991 __mlx4_srq_free_icm(dev, srqn); in srq_alloc_res() 1995 set_param_l(out_param, srqn); in srq_alloc_res() 2489 int srqn; in srq_free_res() local 2494 srqn = get_param_l(&in_param); in srq_free_res() 2495 err = rem_res_range(dev, slave, srqn, 1, RES_SRQ, 0); in srq_free_res() 2500 __mlx4_srq_free_icm(dev, srqn); in srq_free_res() 2723 int srq = (be32_to_cpu(qpc->srqn) >> 24) & 1; in qp_get_mtt_size() [all …]
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D | en_resources.c | 90 context->srqn = cpu_to_be32(7 << 28); /* this fills bits 30:28 */ in mlx4_en_fill_qp_context()
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D | eq.c | 559 __func__, be32_to_cpu(eqe->event.srq.srqn), in mlx4_eq_int() 567 be32_to_cpu(eqe->event.srq.srqn) in mlx4_eq_int() 580 be32_to_cpu(eqe->event.srq.srqn), in mlx4_eq_int() 593 mlx4_srq_event(dev, be32_to_cpu(eqe->event.srq.srqn) & in mlx4_eq_int()
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D | mlx4.h | 977 int __mlx4_srq_alloc_icm(struct mlx4_dev *dev, int *srqn); 978 void __mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn); 1226 void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type);
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/drivers/infiniband/hw/mthca/ |
D | mthca_srq.c | 136 context->state_logsize_srqn = cpu_to_be32(logsize << 24 | srq->srqn); in mthca_arbel_init_srq_context() 237 srq->srqn = mthca_alloc(&dev->srq_table.alloc); in mthca_alloc_srq() 238 if (srq->srqn == -1) in mthca_alloc_srq() 242 err = mthca_table_get(dev, dev->srq_table.table, srq->srqn); in mthca_alloc_srq() 248 srq->srqn, &srq->db); in mthca_alloc_srq() 276 err = mthca_SW2HW_SRQ(dev, mailbox, srq->srqn); in mthca_alloc_srq() 285 srq->srqn & (dev->limits.num_srqs - 1), in mthca_alloc_srq() 303 err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn); in mthca_alloc_srq() 319 mthca_table_put(dev, dev->srq_table.table, srq->srqn); in mthca_alloc_srq() 322 mthca_free(&dev->srq_table.alloc, srq->srqn); in mthca_alloc_srq() [all …]
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D | mthca_provider.h | 226 int srqn; member
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D | mthca_eq.c | 146 __be32 srqn; member 302 mthca_srq_event(dev, be32_to_cpu(eqe->event.srq.srqn) & 0xffffff, in mthca_eq_int()
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D | mthca_dev.h | 520 void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
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D | mthca_qp.c | 152 __be32 srqn; member 785 qp_context->srqn = cpu_to_be32(1 << 24 | in __mthca_modify_qp() 786 to_msrq(ibqp->srq)->srqn); in __mthca_modify_qp()
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D | mthca_provider.c | 444 if (context && ib_copy_to_udata(udata, &srq->srqn, sizeof(__u32))) { in mthca_create_srq()
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/drivers/infiniband/hw/hns/ |
D | hns_roce_srq.c | 12 void hns_roce_srq_event(struct hns_roce_dev *hr_dev, u32 srqn, int event_type) in hns_roce_srq_event() argument 18 srq = xa_load(&srq_table->xa, srqn & (hr_dev->caps.num_srqs - 1)); in hns_roce_srq_event() 24 dev_warn(hr_dev->dev, "Async event for bogus SRQ %08x\n", srqn); in hns_roce_srq_event() 54 event_type, srq->srqn); in hns_roce_ib_srq_event() 113 ret = hns_roce_bitmap_alloc(&srq_table->bitmap, &srq->srqn); in hns_roce_srq_alloc() 119 ret = hns_roce_table_get(hr_dev, &srq_table->table, srq->srqn); in hns_roce_srq_alloc() 123 ret = xa_err(xa_store(&srq_table->xa, srq->srqn, srq, GFP_KERNEL)); in hns_roce_srq_alloc() 137 ret = hns_roce_sw2hw_srq(hr_dev, mailbox, srq->srqn); in hns_roce_srq_alloc() 147 xa_erase(&srq_table->xa, srq->srqn); in hns_roce_srq_alloc() 150 hns_roce_table_put(hr_dev, &srq_table->table, srq->srqn); in hns_roce_srq_alloc() [all …]
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D | hns_roce_device.h | 525 unsigned long srqn; member 1279 void hns_roce_srq_event(struct hns_roce_dev *hr_dev, u32 srqn, int event_type);
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D | hns_roce_hw_v2.c | 3347 to_hr_srq(ibqp->srq)->srqn); in modify_qp_reset_to_init() 3620 to_hr_srq(ibqp->srq)->srqn); in modify_qp_init_to_init() 5029 u32 srqn; in hns_roce_v2_aeq_int() local 5051 srqn = roce_get_field(aeqe->event.srq_event.srq, in hns_roce_v2_aeq_int() 5068 hns_roce_srq_event(hr_dev, srqn, event_type); in hns_roce_v2_aeq_int() 6049 SRQC_BYTE_4_SRQN_S, srq->srqn); in hns_roce_v2_write_srqc() 6151 ret = hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0, srq->srqn, 0, in hns_roce_v2_modify_srq() 6179 ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, srq->srqn, 0, in hns_roce_v2_query_srq() 6298 (srq->srqn & V2_DB_BYTE_4_TAG_M)); in hns_roce_v2_post_srq_recv()
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/drivers/infiniband/hw/mlx5/ |
D | srq_cmd.c | 81 struct mlx5_core_srq *mlx5_cmd_get_srq(struct mlx5_ib_dev *dev, u32 srqn) in mlx5_cmd_get_srq() argument 87 srq = xa_load(&table->array, srqn); in mlx5_cmd_get_srq() 126 srq->srqn = MLX5_GET(create_srq_out, create_out, srqn); in create_srq_cmd() 140 MLX5_SET(destroy_srq_in, srq_in, srqn, srq->srqn); in destroy_srq_cmd() 155 MLX5_SET(arm_rq_in, srq_in, srq_number, srq->srqn); in arm_srq_cmd() 177 MLX5_SET(query_srq_in, srq_in, srqn, srq->srqn); in query_srq_cmd() 227 srq->srqn = MLX5_GET(create_xrc_srq_out, create_out, xrc_srqn); in create_xrc_srq_cmd() 242 MLX5_SET(destroy_xrc_srq_in, xrcsrq_in, xrc_srqn, srq->srqn); in destroy_xrc_srq_cmd() 257 MLX5_SET(arm_xrc_srq_in, xrcsrq_in, xrc_srqn, srq->srqn); in arm_xrc_srq_cmd() 281 MLX5_SET(query_xrc_srq_in, xrcsrq_in, xrc_srqn, srq->srqn); in query_xrc_srq_cmd() [all …]
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D | srq.h | 22 u32 srqn; member 42 u32 srqn; member 64 struct mlx5_core_srq *mlx5_cmd_get_srq(struct mlx5_ib_dev *dev, u32 srqn);
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D | srq.c | 36 type, srq->srqn); in mlx5_ib_srq_event() 308 mlx5_ib_dbg(dev, "create SRQ with srqn 0x%x\n", srq->msrq.srqn); in mlx5_ib_create_srq() 311 srq->ibsrq.ext.xrc.srq_num = srq->msrq.srqn; in mlx5_ib_create_srq() 314 if (ib_copy_to_udata(udata, &srq->msrq.srqn, sizeof(__u32))) { in mlx5_ib_create_srq()
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D | cq.c | 181 msrq = mlx5_cmd_get_srq(dev, be32_to_cpu(cqe->srqn)); in handle_responder() 1039 if (srq && (ntohl(cqe64->srqn) & 0xffffff)) in __mlx5_ib_cq_clean()
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D | devx.c | 537 MLX5_GET(query_srq_in, in, srqn)); in devx_get_obj_id() 602 to_msrq(uobj->object)->msrq.srqn) == in devx_is_valid_obj_id()
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D | qp.c | 2225 MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); in create_qp_common() 2231 MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); in create_qp_common() 2236 MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); in create_qp_common() 2239 MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); in create_qp_common() 2573 MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); in mlx5_ib_create_dct()
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/drivers/infiniband/hw/vmw_pvrdma/ |
D | pvrdma_srq.c | 191 srq->srq_handle = resp->srqn; in pvrdma_create_srq() 192 srq_resp.srqn = resp->srqn; in pvrdma_create_srq()
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D | pvrdma_dev_api.h | 523 u32 srqn; member
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D | pvrdma_main.c | 363 static void pvrdma_srq_event(struct pvrdma_dev *dev, u32 srqn, int type) in pvrdma_srq_event() argument 370 srq = dev->srq_tbl[srqn % dev->dsr->caps.max_srq]; in pvrdma_srq_event()
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/drivers/infiniband/hw/mlx4/ |
D | srq.c | 64 "on SRQ %06x\n", type, srq->srqn); in mlx4_ib_srq_event() 185 srq->ibsrq.ext.xrc.srq_num = srq->msrq.srqn; in mlx4_ib_create_srq() 188 if (ib_copy_to_udata(udata, &srq->msrq.srqn, sizeof (__u32))) { in mlx4_ib_create_srq()
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D | qp.c | 2455 context->srqn = cpu_to_be32(1 << 24 | in __mlx4_ib_modify_qp() 2456 to_msrq(ibsrq)->msrq.srqn); in __mlx4_ib_modify_qp() 2505 context->srqn = cpu_to_be32(7 << 28); in __mlx4_ib_modify_qp()
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