Home
last modified time | relevance | path

Searched refs:t3_wr (Results 1 – 5 of 5) sorted by relevance

/drivers/infiniband/hw/cxgb3/
Diwch_qp.c42 static int build_rdma_send(union t3_wr *wqe, const struct ib_send_wr *wr, in build_rdma_send()
87 static int build_rdma_write(union t3_wr *wqe, const struct ib_send_wr *wr, in build_rdma_write()
128 static int build_rdma_read(union t3_wr *wqe, const struct ib_send_wr *wr, in build_rdma_read()
149 static int build_memreg(union t3_wr *wqe, const struct ib_reg_wr *wr, in build_memreg()
175 wqe = (union t3_wr *)(wq->queue + in build_memreg()
192 static int build_inv_stag(union t3_wr *wqe, const struct ib_send_wr *wr, in build_inv_stag()
248 static int build_rdma_recv(struct iwch_qp *qhp, union t3_wr *wqe, in build_rdma_recv()
288 static int build_zero_stag_recv(struct iwch_qp *qhp, union t3_wr *wqe, in build_zero_stag_recv()
360 union t3_wr *wqe; in iwch_post_send()
386 wqe = (union t3_wr *) (qhp->wq.queue + idx); in iwch_post_send()
[all …]
Dcxio_wr.h393 union t3_wr { union
439 ((union t3_wr *)wqe)->genbit.genbit = cpu_to_be64(genbit); in build_fw_riwrh()
692 union t3_wr *queue; /* DMA accessible memory */
Dcxio_hal.h72 union t3_wr *workq; /* the work request queue */
Dcxio_hal.c280 depth * sizeof(union t3_wr), in cxio_create_qp()
321 * sizeof(union t3_wr), wq->queue, in cxio_destroy_qp()
513 sizeof(union t3_wr), in cxio_hal_init_ctrl_qp()
563 * sizeof(union t3_wr), rdev_p->ctrl_qp.workq, in cxio_hal_destroy_ctrl_qp()
Diwch_provider.c837 mm1->len = PAGE_ALIGN(wqsize * sizeof(union t3_wr)); in iwch_create_qp()