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Searched refs:tx_delay (Results 1 – 13 of 13) sorted by relevance

/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-rk.c31 int tx_delay, int rx_delay);
62 int tx_delay; member
165 int tx_delay, int rx_delay) in rk3128_set_to_rgmii() argument
178 DELAY_ENABLE(RK3128, tx_delay, rx_delay) | in rk3128_set_to_rgmii()
180 RK3128_GMAC_CLK_TX_DL_CFG(tx_delay)); in rk3128_set_to_rgmii()
281 int tx_delay, int rx_delay) in rk3228_set_to_rgmii() argument
293 DELAY_ENABLE(RK3228, tx_delay, rx_delay)); in rk3228_set_to_rgmii()
297 RK3228_GMAC_CLK_TX_DL_CFG(tx_delay)); in rk3228_set_to_rgmii()
403 int tx_delay, int rx_delay) in rk3288_set_to_rgmii() argument
416 DELAY_ENABLE(RK3288, tx_delay, rx_delay) | in rk3288_set_to_rgmii()
[all …]
Ddwmac-mediatek.c44 u32 tx_delay; member
116 mac_delay->tx_delay /= 550; in mt2712_delay_ps2stage()
124 mac_delay->tx_delay /= 170; in mt2712_delay_ps2stage()
142 delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->tx_delay); in mt2712_set_delay()
143 delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->tx_delay); in mt2712_set_delay()
187 delay_val |= FIELD_PREP(ETH_DLY_GTXC_ENABLE, !!mac_delay->tx_delay); in mt2712_set_delay()
188 delay_val |= FIELD_PREP(ETH_DLY_GTXC_STAGES, mac_delay->tx_delay); in mt2712_set_delay()
234 mac_delay->tx_delay = tx_delay_ps; in mediatek_dwmac_config_dt()
/drivers/net/hamradio/
Dhdlcdrv.c225 s->ch_params.tx_delay = data[1]; in do_kiss_params()
226 PKP("TX delay = %ums", 10 * s->ch_params.tx_delay); in do_kiss_params()
355 s->hdlctx.numflags = tenms_to_2flags(s, s->ch_params.tx_delay); in start_tx()
506 bi.data.cp.tx_delay = s->ch_params.tx_delay; in hdlcdrv_ioctl()
516 s->ch_params.tx_delay = bi.data.cp.tx_delay; in hdlcdrv_ioctl()
D6pack.c110 unsigned char tx_delay; member
194 count = encode_sixpack(p, sp->xbuff, len, sp->tx_delay); in sp_encaps()
198 case 1: sp->tx_delay = p[1]; in sp_encaps()
606 sp->tx_delay = SIXP_TXDELAY; in sixpack_open()
795 int length, unsigned char tx_delay) in encode_sixpack() argument
804 buf[0] = tx_delay; in encode_sixpack()
Dbaycom_epp.c331 bc->ch_params.tx_delay = data[1]; in do_kiss_params()
332 PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay); in do_kiss_params()
447 bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay); in transmit()
1023 hi.data.cp.tx_delay = bc->ch_params.tx_delay; in baycom_ioctl()
1033 bc->ch_params.tx_delay = hi.data.cp.tx_delay; in baycom_ioctl()
/drivers/staging/octeon/
Dethernet.c652 bool tx_delay; in cvm_set_rgmii_delay() local
658 tx_delay = true; in cvm_set_rgmii_delay()
666 tx_delay = delay_value > 0; in cvm_set_rgmii_delay()
669 if (!rx_delay && !tx_delay) in cvm_set_rgmii_delay()
673 else if (!tx_delay) in cvm_set_rgmii_delay()
/drivers/isdn/mISDN/
Ddsp_cmx.c1765 if (delay < dsp->tx_delay[0])
1766 dsp->tx_delay[0] = delay;
1801 delay = dsp->tx_delay[0];
1804 if (delay > dsp->tx_delay[i])
1805 delay = dsp->tx_delay[i];
1835 dsp->tx_delay[i] = dsp->tx_delay[i - 1];
1838 dsp->tx_delay[0] = CMX_BUFF_HALF; /* (infinite) delay */
Ddsp.h203 int tx_delay[MAX_SECONDS_JITTER_CHECK]; member
/drivers/net/ethernet/apm/xgene/
Dxgene_enet_main.h233 u8 tx_delay; member
Dxgene_enet_hw.c490 CFG_TXCLK_MUXSEL0_SET(&rgmii, pdata->tx_delay); in xgene_gmac_set_speed()
Dxgene_enet_main.c1582 pdata->tx_delay = 4; in xgene_get_tx_delay()
1591 pdata->tx_delay = delay; in xgene_get_tx_delay()
/drivers/net/arcnet/
Darcnet.c200 unsigned long tx_delay = 50; in arcnet_led_event() local
217 &tx_delay, &tx_delay, 0); in arcnet_led_event()
/drivers/net/dsa/
Dmt7530.c639 u8 tx_delay = 0; in mt7530_setup_port5() local
685 tx_delay = 4; /* n * 0.5 ns */ in mt7530_setup_port5()
689 CSR_RGMII_TXC_CFG(0x10 + tx_delay)); in mt7530_setup_port5()