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Searched refs:txdctl (Results 1 – 10 of 10) sorted by relevance

/drivers/net/ethernet/intel/fm10k/
Dfm10k_common.c479 u32 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(0)); in fm10k_get_host_state_generic() local
485 if (!(~txdctl) || !(txdctl & FM10K_TXDCTL_ENABLE)) in fm10k_get_host_state_generic()
489 if (!mac->get_host_state || !(~txdctl)) in fm10k_get_host_state_generic()
493 if (mac->tx_ready && !(txdctl & FM10K_TXDCTL_ENABLE)) { in fm10k_get_host_state_generic()
Dfm10k_pf.c832 u32 msg[4], txdctl, txqctl, tdbal = 0, tdbah = 0; in fm10k_iov_assign_default_mac_vlan_pf() local
895 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(vf_q_idx)); in fm10k_iov_assign_default_mac_vlan_pf()
896 for (timeout = 0; txdctl & FM10K_TXDCTL_ENABLE; timeout++) { in fm10k_iov_assign_default_mac_vlan_pf()
904 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(vf_q_idx)); in fm10k_iov_assign_default_mac_vlan_pf()
Dfm10k_pci.c874 u32 txdctl = BIT(FM10K_TXDCTL_MAX_TIME_SHIFT) | FM10K_TXDCTL_ENABLE; in fm10k_configure_tx_ring() local
919 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), txdctl); in fm10k_configure_tx_ring()
934 u32 txdctl; in fm10k_enable_tx_ring() local
944 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)); in fm10k_enable_tx_ring()
945 } while (!(txdctl & FM10K_TXDCTL_ENABLE) && --wait_loop); in fm10k_enable_tx_ring()
/drivers/net/ethernet/intel/igbvf/
Dnetdev.c1286 u32 txdctl, dca_txctrl; in igbvf_configure_tx() local
1289 txdctl = er32(TXDCTL(0)); in igbvf_configure_tx()
1290 ew32(TXDCTL(0), txdctl & ~E1000_TXDCTL_QUEUE_ENABLE); in igbvf_configure_tx()
1313 txdctl |= E1000_TXDCTL_QUEUE_ENABLE; in igbvf_configure_tx()
1314 ew32(TXDCTL(0), txdctl); in igbvf_configure_tx()
1563 u32 rxdctl, txdctl; in igbvf_down() local
1578 txdctl = er32(TXDCTL(0)); in igbvf_down()
1579 ew32(TXDCTL(0), txdctl & ~E1000_TXDCTL_QUEUE_ENABLE); in igbvf_down()
/drivers/net/ethernet/intel/e1000e/
Dich8lan.c4760 u32 ctrl_ext, txdctl, snoop; in e1000_init_hw_ich8lan() local
4797 txdctl = er32(TXDCTL(0)); in e1000_init_hw_ich8lan()
4798 txdctl = ((txdctl & ~E1000_TXDCTL_WTHRESH) | in e1000_init_hw_ich8lan()
4800 txdctl = ((txdctl & ~E1000_TXDCTL_PTHRESH) | in e1000_init_hw_ich8lan()
4802 ew32(TXDCTL(0), txdctl); in e1000_init_hw_ich8lan()
4803 txdctl = er32(TXDCTL(1)); in e1000_init_hw_ich8lan()
4804 txdctl = ((txdctl & ~E1000_TXDCTL_WTHRESH) | in e1000_init_hw_ich8lan()
4806 txdctl = ((txdctl & ~E1000_TXDCTL_PTHRESH) | in e1000_init_hw_ich8lan()
4808 ew32(TXDCTL(1), txdctl); in e1000_init_hw_ich8lan()
Dnetdev.c2944 u32 txdctl = er32(TXDCTL(0)); in e1000_configure_tx() local
2946 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | in e1000_configure_tx()
2957 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE; in e1000_configure_tx()
2958 ew32(TXDCTL(0), txdctl); in e1000_configure_tx()
/drivers/net/ethernet/intel/igc/
Digc_main.c606 u32 txdctl = 0; in igc_configure_tx_ring() local
623 txdctl |= IGC_TX_PTHRESH; in igc_configure_tx_ring()
624 txdctl |= IGC_TX_HTHRESH << 8; in igc_configure_tx_ring()
625 txdctl |= IGC_TX_WTHRESH << 16; in igc_configure_tx_ring()
627 txdctl |= IGC_TXDCTL_QUEUE_ENABLE; in igc_configure_tx_ring()
628 wr32(IGC_TXDCTL(reg_idx), txdctl); in igc_configure_tx_ring()
/drivers/net/ethernet/intel/ixgbe/
Dixgbe_main.c3483 u32 txdctl = IXGBE_TXDCTL_ENABLE; in ixgbe_configure_tx_ring() local
3514 txdctl |= 1u << 16; /* WTHRESH = 1 */ in ixgbe_configure_tx_ring()
3516 txdctl |= 8u << 16; /* WTHRESH = 8 */ in ixgbe_configure_tx_ring()
3522 txdctl |= (1u << 8) | /* HTHRESH = 1 */ in ixgbe_configure_tx_ring()
3551 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl); in ixgbe_configure_tx_ring()
3561 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); in ixgbe_configure_tx_ring()
3562 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE)); in ixgbe_configure_tx_ring()
5800 u32 txdctl; in ixgbe_disable_tx() local
5848 txdctl = 0; in ixgbe_disable_tx()
5859 txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); in ixgbe_disable_tx()
[all …]
/drivers/net/ethernet/intel/ixgbevf/
Dixgbevf_main.c1682 u32 txdctl = IXGBE_TXDCTL_ENABLE; in ixgbevf_configure_tx_ring() local
1716 txdctl |= (8 << 16); /* WTHRESH = 8 */ in ixgbevf_configure_tx_ring()
1719 txdctl |= (1u << 8) | /* HTHRESH = 1 */ in ixgbevf_configure_tx_ring()
1729 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl); in ixgbevf_configure_tx_ring()
1734 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx)); in ixgbevf_configure_tx_ring()
1735 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE)); in ixgbevf_configure_tx_ring()
/drivers/net/ethernet/intel/igb/
Digb_main.c4133 u32 txdctl = 0; in igb_configure_tx_ring() local
4147 txdctl |= IGB_TX_PTHRESH; in igb_configure_tx_ring()
4148 txdctl |= IGB_TX_HTHRESH << 8; in igb_configure_tx_ring()
4149 txdctl |= IGB_TX_WTHRESH << 16; in igb_configure_tx_ring()
4155 txdctl |= E1000_TXDCTL_QUEUE_ENABLE; in igb_configure_tx_ring()
4156 wr32(E1000_TXDCTL(reg_idx), txdctl); in igb_configure_tx_ring()