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Searched refs:vce_states (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Damdgpu_dpm.c530 adev->pm.dpm.vce_states[i].evclk = in amdgpu_parse_extended_power_table()
532 adev->pm.dpm.vce_states[i].ecclk = in amdgpu_parse_extended_power_table()
534 adev->pm.dpm.vce_states[i].clk_idx = in amdgpu_parse_extended_power_table()
536 adev->pm.dpm.vce_states[i].pstate = in amdgpu_parse_extended_power_table()
902 return &adev->pm.dpm.vce_states[idx]; in amdgpu_get_vce_clock_state()
Dkv_dpm.c2221 new_rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in kv_apply_state_adjust_rules()
2222 new_rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; in kv_apply_state_adjust_rules()
2248 if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk) in kv_apply_state_adjust_rules()
2249 sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk; in kv_apply_state_adjust_rules()
2779 clock_array_index = adev->pm.dpm.vce_states[i].clk_idx; in kv_parse_power_table()
2784 adev->pm.dpm.vce_states[i].sclk = sclk; in kv_parse_power_table()
2785 adev->pm.dpm.vce_states[i].mclk = 0; in kv_parse_power_table()
Damdgpu_dpm.h396 struct amd_vce_state vce_states[AMD_MAX_VCE_LEVELS]; member
Dsi_dpm.c3467 rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in si_apply_state_adjust_rules()
3468 rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; in si_apply_state_adjust_rules()
3557 if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk) in si_apply_state_adjust_rules()
3558 sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk; in si_apply_state_adjust_rules()
3559 if (mclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk) in si_apply_state_adjust_rules()
3560 mclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk; in si_apply_state_adjust_rules()
7291 clock_array_index = adev->pm.dpm.vce_states[i].clk_idx; in si_parse_power_table()
7298 adev->pm.dpm.vce_states[i].sclk = sclk; in si_parse_power_table()
7299 adev->pm.dpm.vce_states[i].mclk = mclk; in si_parse_power_table()
/drivers/gpu/drm/radeon/
Dtrinity_dpm.c1556 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in trinity_apply_state_adjust_rules()
1557 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in trinity_apply_state_adjust_rules()
1574 if (ps->levels[i].sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in trinity_apply_state_adjust_rules()
1575 ps->levels[i].sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in trinity_apply_state_adjust_rules()
1808 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; in trinity_parse_power_table()
1813 rdev->pm.dpm.vce_states[i].sclk = sclk; in trinity_parse_power_table()
1814 rdev->pm.dpm.vce_states[i].mclk = 0; in trinity_parse_power_table()
Dkv_dpm.c2156 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in kv_apply_state_adjust_rules()
2157 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in kv_apply_state_adjust_rules()
2183 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in kv_apply_state_adjust_rules()
2184 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in kv_apply_state_adjust_rules()
2711 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; in kv_parse_power_table()
2716 rdev->pm.dpm.vce_states[i].sclk = sclk; in kv_parse_power_table()
2717 rdev->pm.dpm.vce_states[i].mclk = 0; in kv_parse_power_table()
Dr600_dpm.c1122 rdev->pm.dpm.vce_states[i].evclk = in r600_parse_extended_power_table()
1124 rdev->pm.dpm.vce_states[i].ecclk = in r600_parse_extended_power_table()
1126 rdev->pm.dpm.vce_states[i].clk_idx = in r600_parse_extended_power_table()
1128 rdev->pm.dpm.vce_states[i].pstate = in r600_parse_extended_power_table()
Dsi_dpm.c3008 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in si_apply_state_adjust_rules()
3009 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in si_apply_state_adjust_rules()
3098 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in si_apply_state_adjust_rules()
3099 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in si_apply_state_adjust_rules()
3100 if (mclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk) in si_apply_state_adjust_rules()
3101 mclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk; in si_apply_state_adjust_rules()
6886 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; in si_parse_power_table()
6893 rdev->pm.dpm.vce_states[i].sclk = sclk; in si_parse_power_table()
6894 rdev->pm.dpm.vce_states[i].mclk = mclk; in si_parse_power_table()
Dci_dpm.c806 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in ci_apply_state_adjust_rules()
807 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in ci_apply_state_adjust_rules()
849 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in ci_apply_state_adjust_rules()
850 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in ci_apply_state_adjust_rules()
851 if (mclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk) in ci_apply_state_adjust_rules()
852 mclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk; in ci_apply_state_adjust_rules()
5621 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; in ci_parse_power_table()
5628 rdev->pm.dpm.vce_states[i].sclk = sclk; in ci_parse_power_table()
5629 rdev->pm.dpm.vce_states[i].mclk = mclk; in ci_parse_power_table()
Dradeon.h1547 struct radeon_vce_state vce_states[RADEON_MAX_VCE_LEVELS]; member
/drivers/gpu/drm/amd/powerplay/inc/
Dhwmgr.h750 struct amd_vce_state vce_states[AMD_MAX_VCE_LEVELS]; member
/drivers/gpu/drm/amd/powerplay/hwmgr/
Dprocess_pptables_v1_0.c1332 ppt_get_vce_state_table_entry_v1_0(hwmgr, j, &(hwmgr->vce_states[j]), NULL, &flags); in get_powerplay_table_entry_v1_0()
/drivers/gpu/drm/amd/powerplay/
Damd_powerplay.c869 return &hwmgr->vce_states[idx]; in pp_dpm_get_vce_clock_state()