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Searched refs:vddci_dependency_on_mclk (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/amd/powerplay/hwmgr/
Dprocesspptables.c1214 hwmgr->dyn_state.vddci_dependency_on_mclk = NULL; in init_clock_voltage_dependency()
1317 &hwmgr->dyn_state.vddci_dependency_on_mclk, table); in init_clock_voltage_dependency()
1653 kfree(hwmgr->dyn_state.vddci_dependency_on_mclk); in pp_tables_uninitialize()
1654 hwmgr->dyn_state.vddci_dependency_on_mclk = NULL; in pp_tables_uninitialize()
Dsmu7_hwmgr.c291 hwmgr->dyn_state.vddci_dependency_on_mclk); in smu7_construct_voltage_tables()
726 allowed_vdd_mclk_table = hwmgr->dyn_state.vddci_dependency_on_mclk; in smu7_setup_dpm_tables_v0()
2414 tmp = smu7_patch_vddci(hwmgr, hwmgr->dyn_state.vddci_dependency_on_mclk); in smu7_patch_dependency_tables_with_leakage()
2460 …ock_voltage_dependency_table *allowed_mclk_vddci_table = hwmgr->dyn_state.vddci_dependency_on_mclk; in smu7_set_private_data_based_on_pptable_v0()
2491 …if (hwmgr->dyn_state.vddci_dependency_on_mclk != NULL && hwmgr->dyn_state.vddci_dependency_on_mclk… in smu7_set_private_data_based_on_pptable_v0()
2492 …voltage_on_ac.vddci = hwmgr->dyn_state.vddci_dependency_on_mclk->entries[hwmgr->dyn_state.vddci_de… in smu7_set_private_data_based_on_pptable_v0()
3368 hwmgr->dyn_state.vddci_dependency_on_mclk; in smu7_get_pp_table_entry_v0()
/drivers/gpu/drm/radeon/
Dr600_dpm.c935 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in r600_parse_extended_power_table()
950 kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries); in r600_parse_extended_power_table()
962 kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries); in r600_parse_extended_power_table()
1303 kfree(dyn_state->vddci_dependency_on_mclk.entries); in r600_free_extended_power_table()
Dbtc_dpm.c2212 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in btc_apply_state_adjust_rules()
2221 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in btc_apply_state_adjust_rules()
2230 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in btc_apply_state_adjust_rules()
Dci_dpm.c2165 &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in ci_construct_voltage_tables()
2891 if (rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries) { in ci_populate_single_memory_level()
2893 &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in ci_populate_single_memory_level()
3514 allowed_mclk_table = &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk; in ci_setup_default_dpm_tables()
4925 &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk; in ci_set_private_data_variables_based_on_pptable()
5073 &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk); in ci_patch_dependency_tables_with_leakage()
Dsi_dpm.c3051 btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in si_apply_state_adjust_rules()
3158 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in si_apply_state_adjust_rules()
3998 &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in si_construct_voltage_tables()
5910 &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk); in si_patch_dependency_tables_based_on_leakage()
Dradeon.h1471 struct radeon_clock_voltage_dependency_table vddci_dependency_on_mclk; member
Dni_dpm.c878 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in ni_apply_state_adjust_rules()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_dpm.h209 struct amdgpu_clock_voltage_dependency_table vddci_dependency_on_mclk; member
Damdgpu_dpm.c345 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in amdgpu_parse_extended_power_table()
724 kfree(dyn_state->vddci_dependency_on_mclk.entries); in amdgpu_free_extended_power_table()
Dsi_dpm.c3510 btc_get_max_clock_from_voltage_dependency_table(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in si_apply_state_adjust_rules()
3617 btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in si_apply_state_adjust_rules()
4460 &adev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in si_construct_voltage_tables()
6366 &adev->pm.dpm.dyn_state.vddci_dependency_on_mclk); in si_patch_dependency_tables_based_on_leakage()
/drivers/gpu/drm/amd/powerplay/inc/
Dhwmgr.h622 struct phm_clock_voltage_dependency_table *vddci_dependency_on_mclk; member
/drivers/gpu/drm/amd/powerplay/smumgr/
Diceland_smumgr.c1249 } else if (NULL != hwmgr->dyn_state.vddci_dependency_on_mclk) { in iceland_populate_single_memory_level()
1251 hwmgr->dyn_state.vddci_dependency_on_mclk, in iceland_populate_single_memory_level()
Dci_smumgr.c1192 if (NULL != hwmgr->dyn_state.vddci_dependency_on_mclk) { in ci_populate_single_memory_level()
1194 hwmgr->dyn_state.vddci_dependency_on_mclk, in ci_populate_single_memory_level()