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Searched refs:vlv_dpio_write (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/i915/display/
Dintel_dpio_phy.c659 vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW10(ch), val); in chv_set_phy_signal_level()
666 vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW10(ch), val); in chv_set_phy_signal_level()
672 vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW9(ch), val); in chv_set_phy_signal_level()
678 vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW9(ch), val); in chv_set_phy_signal_level()
686 vlv_dpio_write(dev_priv, pipe, CHV_TX_DW4(ch, i), val); in chv_set_phy_signal_level()
704 vlv_dpio_write(dev_priv, pipe, CHV_TX_DW2(ch, i), val); in chv_set_phy_signal_level()
719 vlv_dpio_write(dev_priv, pipe, CHV_TX_DW3(ch, i), val); in chv_set_phy_signal_level()
725 vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW10(ch), val); in chv_set_phy_signal_level()
730 vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW10(ch), val); in chv_set_phy_signal_level()
751 vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW0(ch), val); in chv_data_lane_soft_reset()
[all …]
Dintel_display.c1421 vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW14(port), tmp); in _chv_enable_pll()
1583 vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW14(port), val); in chv_disable_pll()
7602 vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW9(1), reg_val); in vlv_pllb_recal_opamp()
7607 vlv_dpio_write(dev_priv, pipe, VLV_REF_DW13, reg_val); in vlv_pllb_recal_opamp()
7611 vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW9(1), reg_val); in vlv_pllb_recal_opamp()
7616 vlv_dpio_write(dev_priv, pipe, VLV_REF_DW13, reg_val); in vlv_pllb_recal_opamp()
7771 vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW9_BCAST, 0x0100000f); in vlv_prepare_pll()
7776 vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW8(pipe), reg_val); in vlv_prepare_pll()
7779 vlv_dpio_write(dev_priv, pipe, VLV_CMN_DW0, 0x610); in vlv_prepare_pll()
7793 vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW3(pipe), mdiv); in vlv_prepare_pll()
[all …]
Dintel_display_power.c1426 vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW28, tmp); in chv_dpio_cmn_power_well_enable()
1431 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW6_CH1, tmp); in chv_dpio_cmn_power_well_enable()
1440 vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW30, tmp); in chv_dpio_cmn_power_well_enable()
/drivers/gpu/drm/i915/
Dintel_sideband.h79 void vlv_dpio_write(struct drm_i915_private *i915,
Dintel_sideband.c250 void vlv_dpio_write(struct drm_i915_private *i915, in vlv_dpio_write() function