| /drivers/regulator/ |
| D | tps65910-regulator.c | 96 const unsigned int *voltage_table; member
105 .voltage_table = VRTC_VSEL_table,
112 .voltage_table = VIO_VSEL_table,
128 .voltage_table = VDD3_VSEL_table,
135 .voltage_table = VDIG1_VSEL_table,
142 .voltage_table = VDIG2_VSEL_table,
149 .voltage_table = VPLL_VSEL_table,
156 .voltage_table = VDAC_VSEL_table,
163 .voltage_table = VAUX1_VSEL_table,
170 .voltage_table = VAUX2_VSEL_table,
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| /drivers/gpu/drm/amd/powerplay/hwmgr/ |
| D | ppatomfwctrl.c | 97 struct pp_atomfwctrl_voltage_table *voltage_table) in pp_atomfwctrl_get_voltage_table_v4() argument
116 voltage_table->count = 0; in pp_atomfwctrl_get_voltage_table_v4()
127 voltage_table->entries[i].value = in pp_atomfwctrl_get_voltage_table_v4()
130 voltage_table->entries[i].smio_low = in pp_atomfwctrl_get_voltage_table_v4()
134 voltage_table->count = in pp_atomfwctrl_get_voltage_table_v4()
136 voltage_table->mask_low = in pp_atomfwctrl_get_voltage_table_v4()
139 voltage_table->phase_delay = in pp_atomfwctrl_get_voltage_table_v4()
143 voltage_table->psi1_enable = in pp_atomfwctrl_get_voltage_table_v4()
145 voltage_table->psi0_enable = in pp_atomfwctrl_get_voltage_table_v4()
147 voltage_table->max_vid_step = in pp_atomfwctrl_get_voltage_table_v4()
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| D | smu_helper.c | 408 uint8_t phm_get_voltage_id(pp_atomctrl_voltage_table *voltage_table, in phm_get_voltage_id() argument
411 uint8_t count = (uint8_t) (voltage_table->count); in phm_get_voltage_id()
414 PP_ASSERT_WITH_CODE((NULL != voltage_table), in phm_get_voltage_id()
421 if (voltage_table->entries[i].value >= voltage) in phm_get_voltage_id()
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| D | ppatomctrl.c | 529 pp_atomctrl_voltage_table *voltage_table) in atomctrl_get_voltage_table_v3() argument
553 voltage_table->entries[i].value = in atomctrl_get_voltage_table_v3()
555 voltage_table->entries[i].smio_low = in atomctrl_get_voltage_table_v3()
559 voltage_table->mask_low = in atomctrl_get_voltage_table_v3()
561 voltage_table->count = in atomctrl_get_voltage_table_v3()
563 voltage_table->phase_delay = in atomctrl_get_voltage_table_v3()
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| D | ppatomfwctrl.h | 226 uint8_t voltage_mode, struct pp_atomfwctrl_voltage_table *voltage_table);
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| D | ppatomctrl.h | 303 …wmgr *hwmgr, uint8_t voltage_type, uint8_t voltage_mode, pp_atomctrl_voltage_table *voltage_table);
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| D | smu_helper.h | 83 extern uint8_t phm_get_voltage_id(struct pp_atomctrl_voltage_table *voltage_table,
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| D | smu7_hwmgr.c | 221 static int phm_get_svi2_voltage_table_v0(pp_atomctrl_voltage_table *voltage_table, in phm_get_svi2_voltage_table_v0() argument
227 PP_ASSERT_WITH_CODE((NULL != voltage_table), in phm_get_svi2_voltage_table_v0()
230 voltage_table->mask_low = 0; in phm_get_svi2_voltage_table_v0()
231 voltage_table->phase_delay = 0; in phm_get_svi2_voltage_table_v0()
232 voltage_table->count = voltage_dependency_table->count; in phm_get_svi2_voltage_table_v0()
235 voltage_table->entries[i].value = in phm_get_svi2_voltage_table_v0()
237 voltage_table->entries[i].smio_low = 0; in phm_get_svi2_voltage_table_v0()
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| D | vega10_hwmgr.c | 2499 struct pp_atomfwctrl_voltage_table voltage_table; in vega10_init_smc_table() local
2519 VOLTAGE_OBJ_SVID2, &voltage_table); in vega10_init_smc_table()
2520 pp_table->MaxVidStep = voltage_table.max_vid_step; in vega10_init_smc_table()
2538 data->vddc_voltage_table.psi0_enable = voltage_table.psi0_enable; in vega10_init_smc_table()
2539 data->vddc_voltage_table.psi1_enable = voltage_table.psi1_enable; in vega10_init_smc_table()
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| /drivers/gpu/drm/radeon/ |
| D | cypress_dpm.c | 1469 struct atom_voltage_table *voltage_table) in cypress_trim_voltage_table_to_fit_state_table() argument
1473 if (voltage_table->count <= MAX_NO_VREG_STEPS) in cypress_trim_voltage_table_to_fit_state_table()
1476 diff = voltage_table->count - MAX_NO_VREG_STEPS; in cypress_trim_voltage_table_to_fit_state_table()
1479 voltage_table->entries[i] = voltage_table->entries[i + diff]; in cypress_trim_voltage_table_to_fit_state_table()
1481 voltage_table->count = MAX_NO_VREG_STEPS; in cypress_trim_voltage_table_to_fit_state_table()
1513 struct atom_voltage_table *voltage_table, in cypress_populate_smc_voltage_table() argument
1518 for (i = 0; i < voltage_table->count; i++) { in cypress_populate_smc_voltage_table()
1520 table->lowSMIO[i] |= cpu_to_be32(voltage_table->entries[i].smio_low); in cypress_populate_smc_voltage_table()
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| D | ci_dpm.c | 174 struct atom_voltage_table *voltage_table);
182 struct atom_voltage_table_entry *voltage_table,
2115 struct atom_voltage_table *voltage_table) in ci_get_svi2_voltage_table() argument
2122 voltage_table->mask_low = 0; in ci_get_svi2_voltage_table()
2123 voltage_table->phase_delay = 0; in ci_get_svi2_voltage_table()
2125 voltage_table->count = voltage_dependency_table->count; in ci_get_svi2_voltage_table()
2126 for (i = 0; i < voltage_table->count; i++) { in ci_get_svi2_voltage_table()
2127 voltage_table->entries[i].value = voltage_dependency_table->entries[i].v; in ci_get_svi2_voltage_table()
2128 voltage_table->entries[i].smio_low = 0; in ci_get_svi2_voltage_table()
2197 struct atom_voltage_table_entry *voltage_table, in ci_populate_smc_voltage_table() argument
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| D | si_dpm.c | 3922 struct atom_voltage_table *voltage_table) in si_trim_voltage_table_to_fit_state_table() argument
3926 if (voltage_table->count <= max_voltage_steps) in si_trim_voltage_table_to_fit_state_table()
3929 diff = voltage_table->count - max_voltage_steps; in si_trim_voltage_table_to_fit_state_table()
3932 voltage_table->entries[i] = voltage_table->entries[i + diff]; in si_trim_voltage_table_to_fit_state_table()
3934 voltage_table->count = max_voltage_steps; in si_trim_voltage_table_to_fit_state_table()
3939 struct atom_voltage_table *voltage_table) in si_get_svi2_voltage_table() argument
3946 voltage_table->mask_low = 0; in si_get_svi2_voltage_table()
3947 voltage_table->phase_delay = 0; in si_get_svi2_voltage_table()
3949 voltage_table->count = voltage_dependency_table->count; in si_get_svi2_voltage_table()
3950 for (i = 0; i < voltage_table->count; i++) { in si_get_svi2_voltage_table()
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| D | radeon_atombios.c | 3724 struct atom_voltage_table *voltage_table) in radeon_atom_get_voltage_table() argument
3756 voltage_table->entries[i].value = in radeon_atom_get_voltage_table()
3759 voltage_table->entries[i].value, in radeon_atom_get_voltage_table()
3761 &voltage_table->entries[i].smio_low, in radeon_atom_get_voltage_table()
3762 &voltage_table->mask_low); in radeon_atom_get_voltage_table()
3768 voltage_table->count = formula->ucNumOfVoltageEntries; in radeon_atom_get_voltage_table()
3791 voltage_table->entries[i].value = in radeon_atom_get_voltage_table()
3793 voltage_table->entries[i].smio_low = in radeon_atom_get_voltage_table()
3798 voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal); in radeon_atom_get_voltage_table()
3799 voltage_table->count = gpio->ucGpioEntryNum; in radeon_atom_get_voltage_table()
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| D | ni_dpm.c | 1260 struct atom_voltage_table *voltage_table, in ni_populate_smc_voltage_table() argument
1265 for (i = 0; i < voltage_table->count; i++) { in ni_populate_smc_voltage_table()
1267 table->lowSMIO[i] |= cpu_to_be32(voltage_table->entries[i].smio_low); in ni_populate_smc_voltage_table()
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| D | radeon.h | 331 struct atom_voltage_table *voltage_table);
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_atombios.h | 189 struct atom_voltage_table *voltage_table);
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| D | amdgpu_atombios.c | 1514 struct atom_voltage_table *voltage_table) in amdgpu_atombios_get_voltage_table() argument
1543 voltage_table->entries[i].value = in amdgpu_atombios_get_voltage_table()
1545 voltage_table->entries[i].smio_low = in amdgpu_atombios_get_voltage_table()
1550 voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal); in amdgpu_atombios_get_voltage_table()
1551 voltage_table->count = gpio->ucGpioEntryNum; in amdgpu_atombios_get_voltage_table()
1552 voltage_table->phase_delay = gpio->ucPhaseDelay; in amdgpu_atombios_get_voltage_table()
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| D | si_dpm.c | 4384 struct atom_voltage_table *voltage_table) in si_trim_voltage_table_to_fit_state_table() argument
4388 if (voltage_table->count <= max_voltage_steps) in si_trim_voltage_table_to_fit_state_table()
4391 diff = voltage_table->count - max_voltage_steps; in si_trim_voltage_table_to_fit_state_table()
4394 voltage_table->entries[i] = voltage_table->entries[i + diff]; in si_trim_voltage_table_to_fit_state_table()
4396 voltage_table->count = max_voltage_steps; in si_trim_voltage_table_to_fit_state_table()
4401 struct atom_voltage_table *voltage_table) in si_get_svi2_voltage_table() argument
4408 voltage_table->mask_low = 0; in si_get_svi2_voltage_table()
4409 voltage_table->phase_delay = 0; in si_get_svi2_voltage_table()
4411 voltage_table->count = voltage_dependency_table->count; in si_get_svi2_voltage_table()
4412 for (i = 0; i < voltage_table->count; i++) { in si_get_svi2_voltage_table()
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