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Searched refs:xlat_reg (Results 1 – 4 of 4) sorted by relevance

/drivers/ntb/hw/intel/
Dntb_hw_gen3.c192 ndev->xlat_reg = &gen3_sec_xlat; in gen3_init_ntb()
448 unsigned long xlat_reg, limit_reg; in intel_ntb3_mw_set_trans() local
480 xlat_reg = ndev->xlat_reg->bar2_xlat + (idx * 0x10); in intel_ntb3_mw_set_trans()
481 limit_reg = ndev->xlat_reg->bar2_limit + (idx * 0x10); in intel_ntb3_mw_set_trans()
491 iowrite64(addr, mmio + xlat_reg); in intel_ntb3_mw_set_trans()
492 reg_val = ioread64(mmio + xlat_reg); in intel_ntb3_mw_set_trans()
494 iowrite64(0, mmio + xlat_reg); in intel_ntb3_mw_set_trans()
505 iowrite64(0, mmio + xlat_reg); in intel_ntb3_mw_set_trans()
512 limit_reg = ndev->xlat_reg->bar2_limit + (idx * 0x10) + 0x4000; in intel_ntb3_mw_set_trans()
526 iowrite64(0, mmio + xlat_reg); in intel_ntb3_mw_set_trans()
Dntb_hw_gen1.c614 u.v64 = ioread64(mmio + bar2_off(ndev->xlat_reg->bar2_xlat, 2)); in ndev_ntb_debugfs_read()
619 u.v32 = ioread32(mmio + bar2_off(ndev->xlat_reg->bar2_xlat, 4)); in ndev_ntb_debugfs_read()
623 u.v32 = ioread32(mmio + bar2_off(ndev->xlat_reg->bar2_xlat, 5)); in ndev_ntb_debugfs_read()
627 u.v64 = ioread64(mmio + bar2_off(ndev->xlat_reg->bar2_xlat, 4)); in ndev_ntb_debugfs_read()
632 u.v64 = ioread64(mmio + bar2_off(ndev->xlat_reg->bar2_limit, 2)); in ndev_ntb_debugfs_read()
637 u.v32 = ioread32(mmio + bar2_off(ndev->xlat_reg->bar2_limit, 4)); in ndev_ntb_debugfs_read()
640 u.v32 = ioread32(mmio + bar2_off(ndev->xlat_reg->bar2_limit, 5)); in ndev_ntb_debugfs_read()
644 u.v64 = ioread64(mmio + bar2_off(ndev->xlat_reg->bar2_limit, 4)); in ndev_ntb_debugfs_read()
843 unsigned long base_reg, xlat_reg, limit_reg; in intel_ntb_mw_set_trans() local
875 base_reg = bar0_off(ndev->xlat_reg->bar0_base, bar); in intel_ntb_mw_set_trans()
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Dntb_hw_intel.h171 const struct intel_ntb_xlat_reg *xlat_reg; member
/drivers/ntb/hw/amd/
Dntb_hw_amd.c123 unsigned long xlat_reg, limit_reg = 0; in amd_ntb_mw_set_trans() local
148 xlat_reg = AMD_BAR23XLAT_OFFSET + ((bar - 2) << 2); in amd_ntb_mw_set_trans()
155 write64(addr, peer_mmio + xlat_reg); in amd_ntb_mw_set_trans()
156 reg_val = read64(peer_mmio + xlat_reg); in amd_ntb_mw_set_trans()
158 write64(0, peer_mmio + xlat_reg); in amd_ntb_mw_set_trans()
167 write64(0, peer_mmio + xlat_reg); in amd_ntb_mw_set_trans()
171 xlat_reg = AMD_BAR1XLAT_OFFSET; in amd_ntb_mw_set_trans()
178 write64(addr, peer_mmio + xlat_reg); in amd_ntb_mw_set_trans()
179 reg_val = read64(peer_mmio + xlat_reg); in amd_ntb_mw_set_trans()
181 write64(0, peer_mmio + xlat_reg); in amd_ntb_mw_set_trans()
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