| /tools/testing/selftests/powerpc/ptrace/ |
| D | ptrace-vsx.h | 70 int compare_vsx_vmx(unsigned long *store, unsigned long *load) in compare_vsx_vmx() argument
75 if (store[1 + 2 * i] != load[1 + 2 * i]) { in compare_vsx_vmx()
77 1 + 2 * i, store[i], in compare_vsx_vmx()
85 if (store[i] != load[i]) { in compare_vsx_vmx()
87 i, store[i], i, load[i]); in compare_vsx_vmx()
93 if (!(i % 2) && (store[i] != load[i+1])) { in compare_vsx_vmx()
95 i, store[i], i+1, load[i+1]); in compare_vsx_vmx()
98 if ((i % 2) && (store[i] != load[i-1])) { in compare_vsx_vmx()
100 i, store[i], i-1, load[i-1]); in compare_vsx_vmx()
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| /tools/perf/ui/gtk/ |
| D | hists.c | 97 static void perf_gtk__add_callchain_flat(struct rb_root *root, GtkTreeStore *store, in perf_gtk__add_callchain_flat() argument
119 gtk_tree_store_append(store, &iter, &new_parent); in perf_gtk__add_callchain_flat()
122 gtk_tree_store_set(store, &iter, 0, buf, -1); in perf_gtk__add_callchain_flat()
125 gtk_tree_store_set(store, &iter, col, buf, -1); in perf_gtk__add_callchain_flat()
140 gtk_tree_store_append(store, &iter, &new_parent); in perf_gtk__add_callchain_flat()
143 gtk_tree_store_set(store, &iter, 0, buf, -1); in perf_gtk__add_callchain_flat()
146 gtk_tree_store_set(store, &iter, col, buf, -1); in perf_gtk__add_callchain_flat()
160 static void perf_gtk__add_callchain_folded(struct rb_root *root, GtkTreeStore *store, in perf_gtk__add_callchain_folded() argument
209 gtk_tree_store_append(store, &iter, parent); in perf_gtk__add_callchain_folded()
212 gtk_tree_store_set(store, &iter, 0, buf, -1); in perf_gtk__add_callchain_folded()
[all …]
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| D | annotate.c | 102 GtkListStore *store; in perf_gtk__annotate_symbol() local
112 store = gtk_list_store_newv(MAX_ANN_COLS, col_types); in perf_gtk__annotate_symbol()
123 gtk_tree_view_set_model(GTK_TREE_VIEW(view), GTK_TREE_MODEL(store)); in perf_gtk__annotate_symbol()
124 g_object_unref(GTK_TREE_MODEL(store)); in perf_gtk__annotate_symbol()
130 gtk_list_store_append(store, &iter); in perf_gtk__annotate_symbol()
146 gtk_list_store_set(store, &iter, ANN_COL__PERCENT, s, -1); in perf_gtk__annotate_symbol()
148 gtk_list_store_set(store, &iter, ANN_COL__OFFSET, s, -1); in perf_gtk__annotate_symbol()
150 gtk_list_store_set(store, &iter, ANN_COL__LINE, s, -1); in perf_gtk__annotate_symbol()
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| /tools/perf/scripts/python/ |
| D | stat-cpi.py | 23 def store(time, event, cpu, thread, val, ena, run): function
36 store(time, "cycles", cpu, thread, val, ena, run);
39 store(time, "instructions", cpu, thread, val, ena, run);
42 store(time, "cycles", cpu, thread, val, ena, run);
45 store(time, "instructions", cpu, thread, val, ena, run);
48 store(time, "cycles", cpu, thread, val, ena, run);
51 store(time, "instructions", cpu, thread, val, ena, run);
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| /tools/memory-model/litmus-tests/ |
| D | S+fencewmbonceonce+poacquireonce.litmus | 7 * store against a subsequent store?
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| D | R+poonceonces.litmus | 8 * store propagation delays.
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| D | SB+poonceonces.litmus | 7 * to order the store-buffering pattern, where each process writes to the
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| D | S+poonceonces.litmus | 7 * first store against P1()'s final load, if the smp_store_release()
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| D | SB+fencembonceonces.litmus | 7 * order the store-buffering pattern, where each process writes to the
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| D | R+fencembonceonces.litmus | 7 * counterintuitive litmus tests that illustrates the effects of store
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| D | ISA2+poonceonces.litmus | 6 * Given a release-acquire chain ordering the first process's store
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| D | README | 45 As below, but with store-release replaced with WRITE_ONCE()
49 Can a release-acquire chain order a prior store against
63 As above, but with store-release replaced with WRITE_ONCE()
103 effects of store propagation delays.
109 This is the fully ordered (again, via smp_mb() version of store
130 a prior store against a subsequent store?
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| /tools/memory-model/Documentation/ |
| D | explanation.txt | 85 store instruction accessing the same location (we ignore complicating
168 store to buf but before the store to flag. In this case, r1 and r2
190 store to the same memory location, from any CPU.
196 Since r1 = 1, P0 must store 1 to flag before P1 loads 1 from
204 store to the same address.
209 Since an instruction (in this case, P1's store to flag) cannot
318 is concerned only with the store itself -- its value and its address
385 both branches of an "if" statement store the same value to the same
411 from x could be executed after the store to y. Thus, the memory
479 a control dependency from the load to the store.
[all …]
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| D | recipes.txt | 42 from or store to only part of the variable.
45 use READ_ONCE() and WRITE_ONCE() or stronger to prevent load/store
46 tearing, load/store fusing, and invented loads and stores.
195 load buffering, release-acquire chains, store buffering.
206 outcome in which the first load sees the value written by the second store
207 but the second load does not see the value written by the first store.
233 store, while the smp_load_acquire macro orders the load against any
276 (address dependency, as shown above), the value written by a later store
277 (data dependency), or whether or not a later store is executed in the
353 The LB pattern has one CPU load from one variable and then store to a
[all …]
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| /tools/perf/Documentation/ |
| D | perf-mem.txt | 23 not the pure load (or store latency). Use latency includes any pipeline
41 Select the memory operation type: load or store (default: load,store)
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| D | perf-c2c.txt | 22 On x86, the tool is based on load latency and precise store facility events
28 - type of the access (load and store details)
149 - store access details for each cacheline
176 Total - all store accesses
177 L1Hit - store accesses that hit L1
178 L1Hit - store accesses that missed L1
201 - % of store accesses that hit/missed L1 for given offset within cacheline
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| D | perf-config.txt | 39 The '$HOME/.perfconfig' file is used to store a per-user configuration.
41 store a system-wide default configuration.
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| D | perf.data-file-format.txt | 239 Define additional auxtrace areas in the perf.data. auxtrace is used to store
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| /tools/perf/util/ |
| D | mem-events.h | 54 u32 store; /* count of all stores in trace */ member
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| D | mem-events.c | 394 stats->store++; in c2c_decode_stats()
428 stats->store += add->store; in c2c_add_stats()
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| D | parse-events.l | 359 store|stores|write |
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| /tools/perf/tests/attr/ |
| D | README | 7 The general idea is to store 'struct perf_event_attr' details for
23 store 'fd' and 'group_fd' values to allow checking for groups.
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| /tools/perf/ |
| D | builtin-c2c.c | 641 STAT_FN(store) in STAT_FN()
1148 if (c2c_he->stats.store > 0) { in node_entry()
1150 percent(stats->store, c2c_he->stats.store)); in node_entry()
1938 return has_hitm || c2c_he->stats.store; in valid_hitm_or_store()
2156 fprintf(out, " Store Operations : %10d\n", stats->store); in print_c2c__display_stats()
2180 fprintf(out, " Store HITs on shared lines : %10d\n", stats->store); in print_shared_cacheline_info()
2182 fprintf(out, " Total Merged records : %10d\n", hitm_cnt + stats->store); in print_shared_cacheline_info()
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| /tools/testing/selftests/tc-testing/creating-testcases/ |
| D | AddingTestCases.txt | 18 If you wish to store your custom test cases elsewhere, be sure to run
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| /tools/memory-model/ |
| D | README | 207 case as a store release.
|