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/Documentation/devicetree/bindings/display/panel/
Dtpo,tpg110.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Thierry Reding <thierry.reding@gmail.com>
17 and other properties, and has a control interface over 3WIRE
20 self-describing.
22 +--------+
23 SPI -> | TPO | -> physical display
24 RGB -> | TPG110 |
[all …]
Dkingdisplay,kd035g6-54nt.txt1 King Display KD035G6-54NT 3.5" (320x240 pixels) 24-bit TFT LCD panel
4 - compatible: should be "kingdisplay,kd035g6-54nt"
5 - power-supply: See panel-common.txt
6 - reset-gpios: See panel-common.txt
9 - backlight: see panel-common.txt
17 [1]: Documentation/devicetree/bindings/spi/spi-bus.txt
24 compatible = "kingdisplay,kd035g6-54nt";
27 spi-max-frequency = <3125000>;
28 spi-3wire;
29 spi-cs-high;
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/Documentation/devicetree/bindings/spi/
Dicpdas-lp8841-spi-rtc.txt1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
23 - There can be only one slave device.
25 - The spi slave node should claim the following flags which are
28 - spi-3wire: The master itself has only 3 wire. It cannor work in
[all …]
Dspi-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
20 pattern: "^spi(@.*|-[0-9a-f])*$"
22 "#address-cells":
25 "#size-cells":
28 cs-gpios:
32 increased automatically with max(cs-gpios, hardware chip selects).
[all …]
/Documentation/devicetree/bindings/display/
Dmulti-inno,mi0283qt.txt1 Multi-Inno MI0283QT display panel
4 - compatible: "multi-inno,mi0283qt".
7 all mandatory properties described in ../spi/spi-bus.txt must be specified.
10 - dc-gpios: D/C pin. The presence/absence of this GPIO determines
11 the panel interface mode (IM[3:0] pins):
12 - present: IM=x110 4-wire 8-bit data serial interface
13 - absent: IM=x101 3-wire 9-bit data serial interface
14 - reset-gpios: Reset pin
15 - power-supply: A regulator node for the supply voltage.
16 - backlight: phandle of the backlight device attached to the panel
[all …]
/Documentation/devicetree/bindings/rtc/
Dmaxim-ds1302.txt1 * Maxim/Dallas Semiconductor DS-1302 RTC
5 The device uses the standard MicroWire half-duplex transfer timing.
12 - compatible : Should be "maxim,ds1302"
16 - reg : Should be address of the device chip select within
19 - spi-max-frequency : DS-1302 has 500 kHz if powered at 2.2V,
22 - spi-3wire : The device has a shared signal IN/OUT line.
24 - spi-lsb-first : DS-1302 requires least significant bit first
27 - spi-cs-high: DS-1302 has active high chip select line. This is
33 #address-cells = <1>;
34 #size-cells = <0>;
[all …]
/Documentation/hwmon/
Dlm85.rst79 - Philip Pokorny <ppokorny@penguincomputing.com>,
80 - Frodo Looijaard <frodol@dds.nl>,
81 - Richard Barrington <rich_b_nz@clear.net.nz>,
82 - Margit Schubert-While <margitsw@t-online.de>,
83 - Justin Thiessen <jthiessen@penguincomputing.com>
86 -----------
92 The LM85 uses the 2-wire interface compatible with the SMBUS 2.0
93 specification. Using an analog to digital converter it measures three (3)
94 temperatures and five (5) voltages. It has four (4) 16-bit counters for
96 VID signals from the processor to the VRM. Lastly, there are three (3) PWM
[all …]
Dasc7621.rst20 Andigilog has both the PECI and pre-PECI versions of the Heceta-6, as
21 Intel calls them. Heceta-6e has high frequency PWM and Heceta-6p has
23 Heceta-6e part and aSC7621 is the Heceta-6p part. They are both in
28 have used registers below 20h for vendor-specific functions in addition
29 to those in the Intel-specified vendor range.
32 The fan speed control uses this finer value to produce a "step-less" fan
33 PWM output. These two bytes are "read-locked" to guarantee that once a
34 high or low byte is read, the other byte is locked-in until after the
37 sheet says 10-bits of resolution, although you may find the lower bits
47 We offer GPIO features on the former VID pins. These are open-drain
[all …]
Dadt7475.rst39 - Jordan Crouse
40 - Hans de Goede
41 - Darrick J. Wong (documentation)
42 - Jean Delvare
46 -----------
56 The ADT747x uses the 2-wire interface compatible with the SMBus 2.0
57 specification. Using an analog to digital converter it measures three (3)
58 temperatures and two (2) or more voltages. It has four (4) 16-bit counters
59 for measuring fan speed. There are three (3) PWM outputs that can be used
78 ------------------------
[all …]
/Documentation/devicetree/bindings/input/touchscreen/
Dti-tsc-adc.txt1 * TI - TSC ADC (Touschscreen and analog digital converter)
5 - mfd
7 "ti,am3359-tscadc" for AM335x/AM437x SoCs
8 "ti,am654-tscadc", "ti,am3359-tscadc" for AM654 SoCs
9 - child "tsc"
10 compatible: Should be "ti,am3359-tsc".
11 ti,wires: Wires refer to application modes i.e. 4/5/8 wire touchscreen
13 ti,x-plate-resistance: X plate resistance
14 ti,coordinate-readouts: The sequencer supports a total of 16
23 ti,wire-config: Different boards could have a different order for
[all …]
/Documentation/spi/
Dspi-lm70llp.rst2 spi_lm70llp : LM70-LLP parport-to-SPI adapter
15 -----------
27 --------------------
28 The schematic for this particular board (the LM70EVAL-LLP) is
39 D0 2 - -
40 D1 3 --> V+ 5
41 D2 4 --> V+ 5
42 D3 5 --> V+ 5
43 D4 6 --> V+ 5
44 D5 7 --> nCS 8
[all …]
Dbutterfly.rst2 spi_butterfly - parport-to-butterfly adapter driver
9 sensors, LCD, flash, toggle stick, and more. You can use AVR-GCC to
28 connector pins (used also on non-Butterfly AVR boards). On the parport
32 Signal Butterfly Parport (DB-25)
35 RESET J403.nRST pin 3/D1
44 by clearing PORTB.[0-3]); (b) configure the mtd_dataflash driver; and
48 Signal Butterfly Parport (DB-25)
57 the driver for your custom SPI-based protocol.
60 That would let you talk to the AVR using custom SPI-with-USI firmware,
62 of spare parport pins to wire this one up, such as:
[all …]
/Documentation/devicetree/bindings/
Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
28 - enum:
29 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
30 - ad,ad7414
31 # ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems
32 - ad,adm9240
[all …]
/Documentation/devicetree/bindings/media/i2c/
Dmt9v032.txt1 * Aptina 1/3-Inch WVGA CMOS Digital Image Sensor
3 The Aptina MT9V032 is a 1/3-inch CMOS active pixel digital image sensor with
5 two-wire serial interface.
9 - compatible: value should be either one among the following
21 - link-frequencies: List of allowed link frequencies in Hz. Each frequency is
22 expressed as a 64-bit big-endian integer.
23 - reset-gpios: GPIO handle which is connected to the reset pin of the chip.
24 - standby-gpios: GPIO handle which is connected to the standby pin of the chip.
27 Documentation/devicetree/bindings/media/video-interfaces.txt.
37 link-frequencies = /bits/ 64
/Documentation/devicetree/bindings/leds/
Dleds-ktd2692.txt1 * Kinetic Technologies - KTD2692 Flash LED Driver
3 KTD2692 is the ideal power solution for high-power flash LEDs.
4 It uses ExpressWire single-wire programming for maximum flexibility.
7 enable/disable the IC, Movie(max 1/3 of Flash current) / Flash mode current,
11 LED current will be ramped up to the flash-mode current level.
14 - compatible : Should be "kinetic,ktd2692".
15 - ctrl-gpios : Specifier of the GPIO connected to CTRL pin.
16 - aux-gpios : Specifier of the GPIO connected to AUX pin.
19 - vin-supply : "vin" LED supply (2.7V to 5.5V).
23 node - See Documentation/devicetree/bindings/leds/common.txt
[all …]
/Documentation/w1/slaves/
Dw1_ds2413.rst7 * Maxim DS2413 1-Wire Dual Channel Addressable Switch
18 -----------
20 The DS2413 chip has two open-drain outputs (PIO A and PIO B).
24 -------------
25 The "state" file provides one-byte value which is in the same format as for
32 Bit 3: PIOB Output Latch State
33 Bit 4-7: Complement of Bit 3 to Bit 0 (verified by the kernel module)
39 --------------
41 It is writable, you can write one-byte value to this sysfs file.
47 Bit 2-7: No matter (driver will set it to "1"s)
/Documentation/devicetree/bindings/net/dsa/
Drealtek-smi.txt1 Realtek SMI-based Switches
4 The SMI "Simple Management Interface" is a two-wire protocol using
5 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
7 SMI-based Realtek devices.
11 - compatible: must be exactly one of:
22 - mdc-gpios: GPIO line for the MDC clock line.
23 - mdio-gpios: GPIO line for the MDIO data line.
24 - reset-gpios: GPIO line for the reset signal.
27 - realtek,disable-leds: if the LED drivers are not used in the
33 - interrupt-controller
[all …]
/Documentation/devicetree/bindings/net/
Dsff,sfp.txt1 Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP)
6 - compatible : must be one of
10 - i2c-bus : phandle of an I2C bus controller for the SFP two wire serial
15 - mod-def0-gpios : GPIO phandle and a specifier of the MOD-DEF0 (AKA Mod_ABS)
19 - los-gpios : GPIO phandle and a specifier of the Receiver Loss of Signal
22 - tx-fault-gpios : GPIO phandle and a specifier of the Module Transmitter
25 - tx-disable-gpios : GPIO phandle and a specifier of the Transmitter Disable
28 - rate-select0-gpios : GPIO phandle and a specifier of the Rx Signaling Rate
32 - rate-select1-gpios : GPIO phandle and a specifier of the Tx Signaling Rate
36 - maximum-power-milliwatt : Maximum module power consumption
[all …]
/Documentation/driver-api/
Dbt8xxgpio.rst2 A driver for a selfmade cheap BT8xx based PCI GPIO-card (bt8xxgpio)
7 A generic digital 24-port PCI GPIO card can be built out of an ordinary
21 GPIO pin and solder that to some tiny wire. As the chip package really is tiny
25 The GPIO pins are marked with G00-G23::
29 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7
31 ---------------------------------------------------------------------------
32 --| ^ ^ |--
33 --| pin 86 pin 67 |--
34 --| |--
35 --| pin 61 > |-- G18
[all …]
/Documentation/scsi/
Dcxgb3i.txt12 - iSCSI PDU digest generation and verification
19 - Direct Data Placement (DDP)
21 S3 h/w can directly place the iSCSI Data-In or Data-Out PDU's
22 payload into pre-posted final destination host-memory buffers based
23 on the Initiator Task Tag (ITT) in Data-In or Target Task Tag (TTT)
24 in Data-Out PDUs.
26 - PDU Transmit and Recovery
31 the TCP segments onto the wire. It handles TCP retransmission if
37 if possible, will be directly placed into the pre-posted host DDP
40 The cxgb3i driver interfaces with open-iscsi initiator and provides the iSCSI
[all …]
/Documentation/devicetree/bindings/powerpc/fsl/
Dmpc5200.txt2 ----------------------------
4 (c) 2006-2009 Secret Lab Technologies Ltd
8 ------------------
9 For mpc5200 on-chip devices, the format for each compatible value is
10 <chip>-<device>[-<mode>]. The OS should be able to match a device driver
21 "fsl,mpc5200-<device>".
29 compatible = "fsl,mpc5200b-<device>","fsl,mpc5200-<device>";
34 ie. ethernet on mpc5200: compatible = "fsl,mpc5200-fec";
35 ethernet on mpc5200b: compatible = "fsl,mpc5200b-fec", "fsl,mpc5200-fec";
39 "fsl,mpc5200-psc-i2s", not "fsl,mpc5200-i2s". This convention is chosen to
[all …]
/Documentation/networking/
Dtls-offload.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
13 For details regarding the user-facing interface refer to the TLS
18 * Software crypto mode (``TLS_SW``) - CPU handles the cryptography.
24 * Packet-based NIC offload mode (``TLS_HW``) - the NIC handles crypto
28 (``ethtool`` flags ``tls-hw-tx-offload`` and ``tls-hw-rx-offload``).
29 * Full TCP NIC offload mode (``TLS_HW_RECORD``) - mode of operation where
33 abilities or QoS and packet scheduling (``ethtool`` flag ``tls-hw-record``).
36 offload opt-in or opt-out on per-connection basis is not currently supported.
39 --
52 --
[all …]
/Documentation/input/devices/
Dxpad.rst2 xpad - Linux USB driver for Xbox compatible controllers
5 This driver exposes all first-party and third-party Xbox compatible
23 The number of buttons/axes reported varies based on 3 things:
25 - if you are using a known controller
26 - if you are using a known dance pad
27 - if using an unknown device (one not listed below), what you set in the
28 module configuration for "Map D-PAD to buttons rather than axes for unknown
33 If you said Y it will map the d-pad to buttons, which is needed for dance
43 ------------------
46 The jstest-program from joystick-1.2.15 (jstest-version 2.1.0) will report 8
[all …]
Djoystick-parport.rst3 .. _joystick-parport:
9 :Copyright: |copy| 1998-2000 Vojtech Pavlik <vojtech@ucw.cz>
10 :Copyright: |copy| 1998 Andree Borrmann <a.borrmann@tu-bs.de>
18 Any information in this file is provided as-is, without any guarantee that
36 Many console and 8-bit computer gamepads and joysticks are supported. The
40 ------------
59 for your pads, use either keyboard or joystick port, and make a pass-through
61 wire is +5V).
69 (pin 9) -----> Power
77 (pin 9) ----|>|-------+------> Power
[all …]
/Documentation/media/v4l-drivers/
Dtuners.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------------------
12 - L= LG_API (VHF_LO=0x01, VHF_HI=0x02, UHF=0x08, radio=0x04)
13 - P= PHILIPS_API (VHF_LO=0xA0, VHF_HI=0x90, UHF=0x30, radio=0x04)
14 - T= TEMIC_API (VHF_LO=0x02, VHF_HI=0x04, UHF=0x01)
15 - A= ALPS_API (VHF_LO=0x14, VHF_HI=0x12, UHF=0x11)
16 - M= PHILIPS_MK3 (VHF_LO=0x01, VHF_HI=0x02, UHF=0x04, radio=0x19)
19 -------------------
21 - SAMSUNG Tuner identification: (e.g. TCPM9091PD27)
23 .. code-block:: none
[all …]

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