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/Documentation/devicetree/bindings/clock/
Dfixed-clock.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Binding for simple fixed-rate clock sources
10 - Michael Turquette <mturquette@baylibre.com>
11 - Stephen Boyd <sboyd@kernel.org>
15 const: fixed-clock
17 "#clock-cells":
20 clock-frequency: true
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/Documentation/hwmon/
Dshtc1.rst41 -----------
48 address 0x70. See Documentation/i2c/instantiating-devices.rst for methods to
53 1. blocking (pull the I2C clock line down while performing the measurement) or
54 non-blocking mode. Blocking mode will guarantee the fastest result but
55 the I2C bus will be busy during that time. By default, non-blocking mode
56 is used. Make sure clock-stretching works properly on your device if you
58 2. high or low accuracy. High accuracy is used by default and using it is
61 sysfs-Interface
62 ---------------
65 - temperature input
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Dpc87360.rst22 -----------------
27 - 0: None
28 - **1**: Forcibly enable internal voltage and temperature channels,
30 - 2: Forcibly enable all voltage and temperature channels, except in9
31 - 3: Forcibly enable all voltage and temperature channels, including in9
42 -----------
56 PC87360 - 2 2 - 0xE1
57 PC87363 - 2 2 - 0xE8
58 PC87364 - 3 3 - 0xE4
60 PC87366 11 3 3 3-4 0xE9
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Dsht3x.rst6 * Sensirion SHT3x-DIS
16 - David Frey <david.frey@sensirion.com>
17 - Pascal Sachs <pascal.sachs@sensirion.com>
20 -----------
22 This driver implements support for the Sensirion SHT3x-DIS chip, a humidity
29 Documentation/i2c/instantiating-devices.rst for methods to instantiate the device.
33 1. blocking (pull the I2C clock line down while performing the measurement) or
34 non-blocking mode. Blocking mode will guarantee the fastest result but
35 the I2C bus will be busy during that time. By default, non-blocking mode
36 is used. Make sure clock-stretching works properly on your device if you
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Dlm63.rst45 -----------
53 - No low limit for local temperature.
54 - No critical limit for local temperature.
55 - Critical limit for remote temperature can be changed only once. We
56 will consider that the critical limit is read-only.
67 store the value in an 8-bit register and have a selectable clock divider
68 to make sure that the result will fit in the register, the LM63 uses 16-bit
93 The LM96163 is an enhanced version of LM63 with improved temperature accuracy
Dit87.rst158 - Christophe Gauthron
159 - Jean Delvare <jdelvare@suse.de>
163 -----------------
176 misconfigured by BIOS - PWM values would be inverted. This option tries
181 -------------------
183 All the chips supported by this driver are LPC Super-I/O chips, accessed
184 through the LPC bus (ISA-like I/O ports). The IT8712F additionally has an
192 -----------
211 is stored in the Super-I/O configuration space. Due to technical limitations,
222 IT8783E/F, and late IT8712F and IT8705F also have optional 16-bit tachometer
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Dw83781d.rst10 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
12 Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/w83781d.pdf
18 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
28 Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/w83783s.pdf
34 Addresses scanned: I2C 0x28 - 0x2f
42 - Frodo Looijaard <frodol@dds.nl>,
43 - Philip Edelbrock <phil@netroedge.com>,
44 - Mark Studebaker <mdsxyz123@yahoo.com>
47 -----------------
67 -----------
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Dsysfs-interface.rst5 through the sysfs interface. Since lm-sensors 3.0.0, libsensors is
6 completely chip-independent. It assumes that all the kernel drivers
10 This is a major improvement compared to lm-sensors 2.
22 For this reason, even if we aim at a chip-independent libsensors, it will
37 Up to lm-sensors 3.0.0, libsensors looks for hardware monitoring attributes
38 in the "physical" device directory. Since lm-sensors 3.0.1, attributes found
61 to cause an alarm) is chip-dependent.
68 -------------------------------------------------------------------------
71 `[0-*]` denotes any positive number starting from 0
72 `[1-*]` denotes any positive number starting from 1
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/Documentation/timers/
Dtimekeeping.rst2 Clock sources, Clock events, sched_clock() and delay timers
10 If you grep through the kernel source you will find a number of architecture-
11 specific implementations of clock sources, clockevents and several likewise
12 architecture-specific overrides of the sched_clock() function and some
15 To provide timekeeping for your platform, the clock source provides
16 the basic timeline, whereas clock events shoot interrupts on certain points
17 on this timeline, providing facilities such as high-resolution timers.
22 Clock sources
23 -------------
25 The purpose of the clock source is to provide a timeline for the system that
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/Documentation/devicetree/bindings/iio/adc/
Dti-adc12138.txt4 - compatible: Should be one of
8 - reg: SPI chip select number for the device
9 - interrupts: Should contain interrupt for EOC (end of conversion)
10 - clocks: phandle to conversion clock input
11 - spi-max-frequency: Definision as per
12 Documentation/devicetree/bindings/spi/spi-bus.txt
13 - vref-p-supply: The regulator supply for positive analog voltage reference
16 - vref-n-supply: The regulator supply for negative analog voltage reference
17 (Note that this must not go below GND or exceed vref-p)
19 - ti,acquisition-time: The number of conversion clock periods for the S/H's
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/Documentation/devicetree/bindings/mtd/
Dlpc32xx-mlc.txt4 - compatible: "nxp,lpc3220-mlc"
5 - reg: Address and size of the controller
6 - interrupts: The NAND interrupt specification
7 - gpios: GPIO specification for NAND write protect
11 Hz, to make them independent of actual clock speed and to provide for good
12 accuracy:)
13 - nxp,tcea_delay: TCEA_DELAY
14 - nxp,busy_delay: BUSY_DELAY
15 - nxp,nand_ta: NAND_TA
16 - nxp,rd_high: RD_HIGH
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/Documentation/sound/designs/
Dtimestamping.rst7 - Trigger_tstamp is the system time snapshot taken when the .trigger
11 estimate with a delay. In the latter two cases, the low-level driver
17 - tstamp is the current system timestamp updated during the last
19 The difference (tstamp - trigger_tstamp) defines the elapsed time.
29 - ``avail`` reports how much can be written in the ring buffer
30 - ``delay`` reports the time it will take to hear a new sample after all
43 ascii-art, this could be represented as follows (for the playback
47 --------------------------------------------------------------> time
53 |< codec delay >|<--hw delay-->|<queued samples>|<---avail->|
54 |<----------------- delay---------------------->| |
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/Documentation/devicetree/bindings/mfd/
Drohm,bd70528-pmic.txt3 BD70528MWV is an ultra-low quiescent current general purpose, single-chip,
4 power management IC for battery-powered portable devices. The IC
5 integrates 3 ultra-low current consumption buck converters, 3 LDOs and 2
6 LED Drivers. Also included are 4 GPIOs, a real-time clock (RTC), a 32kHz
7 clock gate, high-accuracy VREF for use with an external ADC, flexible
8 dual-input power path, 10 bit SAR ADC for battery temperature monitor and
12 - compatible : Should be "rohm,bd70528"
13 - reg : I2C slave address.
14 - interrupts : The interrupt line the device is connected to.
15 - interrupt-controller : To indicate BD70528 acts as an interrupt controller.
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/Documentation/core-api/
Dtimekeeping.rst10 ------------------------------
13 that return time for different clock references:
56 clocksource without (NTP) adjustments for clock drift. This is
60 -----------------------------------------
92 Return a coarse-grained version of the time as a scalar
93 time64_t. This avoids accessing the clock hardware and rounds
98 -------------------------
117 These are quicker than the non-coarse versions, but less accurate,
125 in a fast path and one still expects better than second accuracy,
127 Skipping the hardware clock access saves around 100 CPU cycles
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/Documentation/driver-api/pm/
Dcpuidle.rst1 .. SPDX-License-Identifier: GPL-2.0
95 code, and that causes the kernel to run the architecture-specific
97 until the ``->enable()`` governor callback is invoked for that CPU
109 It is expected to reverse any changes made by the ``->enable()``
148 Called to allow the governor to evaluate the accuracy of the idle state
149 selection made by the ``->select()`` callback (when it was invoked last
150 time) and possibly use the result of that to improve the accuracy of
158 :c:func:`cpuidle_governor_latency_req()`. Then, the governor's ``->select()``
223 The analogous ``->enter_s2idle()`` callback in |struct cpuidle_state| is used
224 only for implementing the suspend-to-idle system-wide power management feature.
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/Documentation/RCU/Design/Memory-Ordering/
DTree-RCU-Memory-Ordering.html1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"
4 <head><title>A Tour Through TREE_RCU's Grace-Period Memory Ordering</title>
5 <meta HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
13 grace-period memory ordering guarantee is provided.
28 <p>RCU grace periods provide extremely strong memory-ordering guarantees
29 for non-idle non-offline code.
32 period that are within RCU read-side critical sections.
35 of that grace period that are within RCU read-side critical sections.
37 <p>Note well that RCU-sched read-side critical sections include any region
40 an extremely small region of preemption-disabled code, one can think of
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