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/Documentation/devicetree/bindings/regulator/
Dregulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
14 regulator-name:
15 description: A string used as a descriptive name for regulator outputs
18 regulator-min-microvolt:
19 description: smallest voltage consumers may set
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Dqcom,rpmh-regulator.txt3 rpmh-regulator devices support PMIC regulator management via the Voltage
4 Regulator Manager (VRM) and Oscillator Buffer (XOB) RPMh accelerators. The APPS
7 parameters for a given regulator: enable state, output voltage, and operating
8 mode. The XOB allows changing only a single parameter for a given regulator:
10 enable state of any PMIC peripheral. It is used for clock buffers, low-voltage
19 RPMh device node. The second level describes each regulator within the PMIC
23 The names used for regulator nodes must match those supported by a given PMIC.
24 Supported regulator node names:
25 PM8005: smps1 - smps4
26 PM8009: smps1 - smps2, ldo1 - ldo7
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/Documentation/arm64/
Darm-acpi.rst21 While the documents mentioned above set out the requirements for building
22 industry-standard ARMv8 servers, they also apply to more than one operating
24 ACPI and Linux only, on an ARMv8 system -- that is, what Linux expects of
29 ----------------
32 exist in Linux for describing non-enumerable hardware, after all. In this
39 - ACPI’s byte code (AML) allows the platform to encode hardware behavior,
44 - ACPI’s OSPM defines a power management model that constrains what the
48 - In the enterprise server environment, ACPI has established bindings (such
54 - Choosing a single interface to describe the abstraction between a platform
60 - The new ACPI governance process works well and Linux is now at the same
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/Documentation/driver-api/
Dpinctl.rst9 - Enumerating and naming controllable pins
11 - Multiplexing of pins, pads, fingers (etc) see below for details
13 - Configuration of pins, pads, fingers (etc), such as software-controlled
14 biasing and driving mode specific pins, such as pull-up/down, open drain,
15 load capacitance etc.
17 Top-level interface
22 - A pin controller is a piece of hardware, usually a set of registers, that
23 can control PINs. It may be able to multiplex, bias, set load capacitance,
24 set drive strength, etc. for individual pins or groups of pins.
28 - PINS are equal to pads, fingers, balls or whatever packaging input or
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