Home
last modified time | relevance | path

Searched refs:AFMT_60958_2 (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dce/
Ddce_stream_encoder.h66 SRI(AFMT_60958_2, DIG, id), \
190 SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, mask_sh),\
191 SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, mask_sh),\
192 SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, mask_sh),\
193 SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, mask_sh),\
194 SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, mask_sh),\
195 SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, mask_sh),\
656 uint32_t AFMT_60958_2; member
Ddce_stream_encoder.c1433 REG_UPDATE_6(AFMT_60958_2, in dce110_se_setup_hdmi_audio()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_stream_encoder.h53 SRI(AFMT_60958_2, DIG, id), \
122 uint32_t AFMT_60958_2; member
Ddcn10_stream_encoder.c1371 REG_UPDATE_6(AFMT_60958_2, in enc1_se_setup_hdmi_audio()
/drivers/gpu/drm/amd/amdgpu/
Ddce_v6_0.c1526 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, 3); in dce_v6_0_audio_set_packet()
1527 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, 4); in dce_v6_0_audio_set_packet()
1528 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, 5); in dce_v6_0_audio_set_packet()
1529 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, 6); in dce_v6_0_audio_set_packet()
1530 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, 7); in dce_v6_0_audio_set_packet()
1531 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, 8); in dce_v6_0_audio_set_packet()
Ddce_v11_0.c1717 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, 3); in dce_v11_0_afmt_setmode()
1718 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, 4); in dce_v11_0_afmt_setmode()
1719 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, 5); in dce_v11_0_afmt_setmode()
1720 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, 6); in dce_v11_0_afmt_setmode()
1721 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, 7); in dce_v11_0_afmt_setmode()
1722 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, 8); in dce_v11_0_afmt_setmode()
Ddce_v10_0.c1675 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, 3); in dce_v10_0_afmt_setmode()
1676 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, 4); in dce_v10_0_afmt_setmode()
1677 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, 5); in dce_v10_0_afmt_setmode()
1678 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, 6); in dce_v10_0_afmt_setmode()
1679 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, 7); in dce_v10_0_afmt_setmode()
1680 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, 8); in dce_v10_0_afmt_setmode()
/drivers/gpu/drm/radeon/
Devergreen_hdmi.c368 WREG32(AFMT_60958_2 + offset, in dce4_set_audio_packet()
Drv770d.h839 #define AFMT_60958_2 0x74f0 macro
Devergreend.h696 #define AFMT_60958_2 0x7120 macro