Home
last modified time | relevance | path

Searched refs:idle (Results 1 – 25 of 131) sorted by relevance

123456

/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dg84.c121 bool idle, timeout = false; in g84_gr_tlb_flush() local
132 idle = true; in g84_gr_tlb_flush()
134 for (tmp = nvkm_rd32(device, 0x400380); tmp && idle; tmp >>= 3) { in g84_gr_tlb_flush()
136 idle = false; in g84_gr_tlb_flush()
139 for (tmp = nvkm_rd32(device, 0x400384); tmp && idle; tmp >>= 3) { in g84_gr_tlb_flush()
141 idle = false; in g84_gr_tlb_flush()
144 for (tmp = nvkm_rd32(device, 0x400388); tmp && idle; tmp >>= 3) { in g84_gr_tlb_flush()
146 idle = false; in g84_gr_tlb_flush()
148 } while (!idle && in g84_gr_tlb_flush()
/drivers/cpuidle/
DKconfig.arm6 bool "Generic ARM/ARM64 CPU idle Driver"
11 It provides a generic idle driver whose idle states are configured
13 initialized by calling the CPU operations init idle hook
17 bool "PSCI CPU idle Driver"
23 It provides an idle driver that is capable of detecting and
24 managing idle states through the PSCI firmware interface.
34 Select this option to enable CPU idle driver for big.LITTLE based
37 multiple CPU idle drivers infrastructure.
DKconfig5 bool "CPU idle PM support"
10 CPU idle is a generic framework for supporting software-controlled
11 idle processor power management. It includes modular cross-platform
30 This governor implements a simplified idle state selection method
40 This governor implements haltpoll idle state selection, to be
42 for polling for a certain amount of time before entering idle
DKconfig.powerpc11 Select this option to enable processor idle state management
20 Select this option to enable processor idle state management
DKconfig.mips14 Select this option to enable processor idle state management
17 the deepest idle states you will need to ensure that you are
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_ids.c199 struct amdgpu_vmid **idle) in amdgpu_vmid_grab_idle() argument
217 list_for_each_entry((*idle), &id_mgr->ids_lru, list) { in amdgpu_vmid_grab_idle()
218 fences[i] = amdgpu_sync_peek_fence(&(*idle)->active, ring); in amdgpu_vmid_grab_idle()
225 if (&(*idle)->list == &id_mgr->ids_lru) { in amdgpu_vmid_grab_idle()
231 *idle = NULL; in amdgpu_vmid_grab_idle()
413 struct amdgpu_vmid *idle = NULL; in amdgpu_vmid_grab() local
418 r = amdgpu_vmid_grab_idle(vm, ring, sync, &idle); in amdgpu_vmid_grab()
419 if (r || !idle) in amdgpu_vmid_grab()
435 id = idle; in amdgpu_vmid_grab()
472 struct amdgpu_vmid *idle; in amdgpu_vmid_alloc_reserved() local
[all …]
/drivers/macintosh/
Dvia-macii.c104 idle, enumerator
152 macii_state = idle; in macii_init()
257 if (macii_state == idle) in macii_write()
389 case idle: in macii_interrupt()
420 macii_state = idle; in macii_interrupt()
436 if (macii_state == idle) { in macii_interrupt()
511 macii_state = idle; in macii_interrupt()
522 if (macii_state == idle) in macii_interrupt()
Dadb-iop.c41 idle, enumerator
133 if (req && (adb_iop_state != idle)) { in adb_iop_listen()
134 adb_iop_end_req(req, idle); in adb_iop_listen()
260 if (adb_iop_state == idle) in adb_iop_write()
273 if (adb_iop_state == idle) in adb_iop_poll()
Dvia-cuda.c155 idle, enumerator
214 cuda_state = idle; in find_via_cuda()
261 cuda_state = idle; in find_via_cuda()
526 if (cuda_state == idle) in cuda_write()
597 case idle: in cuda_interrupt()
622 cuda_state = idle; in cuda_interrupt()
648 cuda_state = idle; in cuda_interrupt()
714 cuda_state = idle; in cuda_interrupt()
716 if (cuda_state == idle && TREQ_asserted(in_8(&via[B]))) { in cuda_interrupt()
Dvia-pmu.c128 idle, enumerator
369 pmu_state = idle; in find_via_pmu()
404 pmu_state = idle; in find_via_pmu()
506 } while (pmu_state != idle); in via_pmu_start()
607 while (interrupt_data[0][0] || pmu_state != idle) { in init_pmu()
612 if (pmu_state == idle) in init_pmu()
1185 if (pmu_state == idle) in pmu_queue_request()
1250 if (!req || pmu_state != idle in pmu_start()
1287 } while (pmu_suspended && (adb_int_pending || pmu_state != idle in pmu_poll_adb()
1296 while((pmu_state != idle && pmu_state != locked) || !req->complete) in pmu_wait_complete()
[all …]
/drivers/gpu/drm/etnaviv/
Detnaviv_gpu.c469 u32 control, idle; in etnaviv_hw_reset() local
507 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE); in etnaviv_hw_reset()
510 if ((idle & VIVS_HI_IDLE_STATE_FE) == 0) { in etnaviv_hw_reset()
534 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE); in etnaviv_hw_reset()
538 idle & VIVS_HI_IDLE_STATE_FE ? "" : "not ", in etnaviv_hw_reset()
838 u32 dma_lo, dma_hi, axi, idle; in etnaviv_gpu_debugfs() local
850 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE); in etnaviv_gpu_debugfs()
907 seq_printf(m, "\tidle: 0x%08x\n", idle); in etnaviv_gpu_debugfs()
908 idle |= ~gpu->idle_mask & ~VIVS_HI_IDLE_STATE_AXI_LP; in etnaviv_gpu_debugfs()
909 if ((idle & VIVS_HI_IDLE_STATE_FE) == 0) in etnaviv_gpu_debugfs()
[all …]
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
Didle.fuc26 process(PROC_IDLE, #idle, #idle_recv)
41 // $r15 - current (idle)
49 // $r15 - current (idle)
51 idle:
83 bra #idle
Dgf119.fuc444 #include "idle.fuc"
55 #include "idle.fuc"
68 #include "idle.fuc"
Dgk208.fuc544 #include "idle.fuc"
55 #include "idle.fuc"
68 #include "idle.fuc"
Dgf100.fuc344 #include "idle.fuc"
55 #include "idle.fuc"
68 #include "idle.fuc"
Dgt215.fuc344 #include "idle.fuc"
55 #include "idle.fuc"
68 #include "idle.fuc"
/drivers/staging/isdn/gigaset/
Disocdata.c21 void gigaset_isowbuf_init(struct isowbuf_t *iwb, unsigned char idle) in gigaset_isowbuf_init() argument
28 iwb->idle = idle; in gigaset_isowbuf_init()
29 memset(iwb->data + BAS_OUTBUFSIZE, idle, BAS_OUTBUFPAD); in gigaset_isowbuf_init()
119 iwb->idle = iwb->data[write]; in isowbuf_putflag()
120 gig_dbg(DEBUG_ISO, "idle fill byte %02x", iwb->idle); in isowbuf_putflag()
168 __func__, write, limit, iwb->idle); in gigaset_isowbuf_getbytes()
170 memset(iwb->data + write, iwb->idle, in gigaset_isowbuf_getbytes()
174 memset(iwb->data + write, iwb->idle, in gigaset_isowbuf_getbytes()
198 memset(iwb->data + dst, iwb->idle, in gigaset_isowbuf_getbytes()
472 iwb->idle = c; in trans_buildframe()
/drivers/i2c/muxes/
Di2c-mux-gpio.c47 i2c_mux_gpio_set(mux, mux->data.idle); in i2c_mux_gpio_deselect()
94 if (of_property_read_u32(np, "idle-state", &mux->data.idle)) in i2c_mux_gpio_probe_dt()
95 mux->data.idle = I2C_MUX_GPIO_NO_IDLE; in i2c_mux_gpio_probe_dt()
156 if (mux->data.idle != I2C_MUX_GPIO_NO_IDLE) { in i2c_mux_gpio_probe()
157 initial_state = mux->data.idle; in i2c_mux_gpio_probe()
/drivers/media/rc/
Drc-ir-raw.c175 if (dev->idle && !ev->pulse) in ir_raw_event_store_with_filter()
177 else if (dev->idle) in ir_raw_event_store_with_filter()
203 void ir_raw_event_set_idle(struct rc_dev *dev, bool idle) in ir_raw_event_set_idle() argument
208 dev_dbg(&dev->dev, "%s idle mode\n", idle ? "enter" : "leave"); in ir_raw_event_set_idle()
210 if (idle) { in ir_raw_event_set_idle()
217 dev->s_idle(dev, idle); in ir_raw_event_set_idle()
219 dev->idle = idle; in ir_raw_event_set_idle()
625 dev->idle = true; in ir_raw_event_prepare()
Drc-loopback.c30 bool idle; member
136 if (lodev->idle != enable) { in loop_set_idle()
138 lodev->idle = enable; in loop_set_idle()
242 loopdev.idle = true; in loop_init()
/drivers/net/wireless/intersil/orinoco/
Dspectrum_cs.c77 spectrum_reset(struct pcmcia_device *link, int idle) in spectrum_reset() argument
108 ccsr = (idle ? HCR_IDLE : HCR_RUN) | (ccsr & HCR_MEM16); in spectrum_reset()
143 spectrum_cs_stop_firmware(struct orinoco_private *priv, int idle) in spectrum_cs_stop_firmware() argument
148 return spectrum_reset(link, idle); in spectrum_cs_stop_firmware()
/drivers/infiniband/sw/rxe/
Drxe_task.c137 bool idle; in rxe_cleanup_task() local
147 idle = (task->state == TASK_STATE_START); in rxe_cleanup_task()
149 } while (!idle); in rxe_cleanup_task()
/drivers/block/
Dswim3.c44 idle, enumerator
316 if (fs->cur_req || fs->state != idle) { in swim3_queue_rq()
477 case idle: in act()
519 fs->state = idle; in act()
555 fs->state = idle; in scan_timeout()
578 fs->state = idle; in seek_timeout()
606 fs->state = idle; in settle_timeout()
634 fs->state = idle; in xfer_timeout()
670 fs->state = idle; in swim3_interrupt()
752 fs->state = idle; in swim3_interrupt()
[all …]
/drivers/block/zram/
DKconfig18 bool "Write back incompressible or idle page to backing device"
26 With /sys/block/zramX/{idle,writeback}, application could ask
27 idle page's writeback to the backing device to save in memory.
/drivers/soc/rockchip/
Dpm_domains.c88 #define DOMAIN(pwr, status, req, idle, ack, wakeup) \ argument
93 .idle_mask = (idle), \
98 #define DOMAIN_M(pwr, status, req, idle, ack, wakeup) \ argument
105 .idle_mask = (idle), \
110 #define DOMAIN_RK3036(req, ack, idle, wakeup) \ argument
115 .idle_mask = (idle), \
153 bool idle) in rockchip_pmu_set_idle_request() argument
167 idle ? (pd_info->req_mask | pd_info->req_w_mask) : in rockchip_pmu_set_idle_request()
171 pd_info->req_mask, idle ? -1U : 0); in rockchip_pmu_set_idle_request()
176 target_ack = idle ? pd_info->ack_mask : 0; in rockchip_pmu_set_idle_request()
[all …]

123456