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Searched refs:irq_source (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_irq.c84 enum dc_irq_source irq_source; member
126 handler_data->irq_source); in dm_irq_work_func()
129 handler_data->irq_source); in dm_irq_work_func()
152 enum dc_irq_source irq_source; in remove_irq_handler() local
156 irq_source = int_params->irq_source; in remove_irq_handler()
160 hnd_list = &adev->dm.irq_handler_list_high_tab[irq_source]; in remove_irq_handler()
164 hnd_list = &adev->dm.irq_handler_list_low_tab[irq_source].head; in remove_irq_handler()
193 ih, int_params->irq_source, int_params->int_context); in remove_irq_handler()
213 if (!DAL_VALID_IRQ_SRC_NUM(int_params->irq_source)) { in validate_irq_registration_params()
215 int_params->irq_source); in validate_irq_registration_params()
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Damdgpu_dm_irq.h80 enum dc_irq_source irq_source,
Damdgpu_dm.c1658 int_params.irq_source = dc_link->irq_source_hpd; in register_hpd_handlers()
1669 int_params.irq_source = dc_link->irq_source_hpd_rx; in register_hpd_handlers()
1714 int_params.irq_source = in dce110_register_irq_handlers()
1717 c_irq_params = &adev->dm.vblank_params[int_params.irq_source - DC_IRQ_SOURCE_VBLANK1]; in dce110_register_irq_handlers()
1720 c_irq_params->irq_src = int_params.irq_source; in dce110_register_irq_handlers()
1735 int_params.irq_source = in dce110_register_irq_handlers()
1738 c_irq_params = &adev->dm.vupdate_params[int_params.irq_source - DC_IRQ_SOURCE_VUPDATE1]; in dce110_register_irq_handlers()
1741 c_irq_params->irq_src = int_params.irq_source; in dce110_register_irq_handlers()
1757 int_params.irq_source = in dce110_register_irq_handlers()
1760 c_irq_params = &adev->dm.pflip_params[int_params.irq_source - DC_IRQ_SOURCE_PFLIP_FIRST]; in dce110_register_irq_handlers()
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/drivers/gpu/drm/amd/display/dc/
Dirq_types.h206 enum dc_irq_source irq_source; member
Ddc.h768 enum dc_irq_source irq_source; member
/drivers/gpu/drm/amd/display/dc/core/
Ddc_surface.c109 plane_state->irq_source = controller_id + DC_IRQ_SOURCE_PFLIP1 - 1; in enable_surface_flip_reporting()
/drivers/spi/
Dspi-bcm-qspi.c167 enum irq_source { enum
175 int irq_source; member
1137 .irq_source = MUXED_L1,
1291 if (qspi_irq_tab[val].irq_source == SINGLE_L2) { in bcm_qspi_probe()
/drivers/gpu/drm/amd/powerplay/
Damdgpu_smu.c900 kfree(smu->irq_source); in smu_sw_fini()
901 smu->irq_source = NULL; in smu_sw_fini()
Dsmu_v11_0.c1565 struct amdgpu_irq_src *irq_src = smu->irq_source; in smu_v11_0_register_irq_handler()
1575 smu->irq_source = irq_src; in smu_v11_0_register_irq_handler()
/drivers/gpu/drm/amd/powerplay/inc/
Damdgpu_smu.h342 struct amdgpu_irq_src *irq_source; member