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Searched refs:p2 (Results 1 – 25 of 81) sorted by relevance

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/drivers/thermal/qcom/
Dtsens-v0_1.c139 u32 p1[5], p2[5]; in calibrate_8916() local
159 p2[0] = (qfprom_cdata[0] & MSM8916_S0_P2_MASK) >> MSM8916_S0_P2_SHIFT; in calibrate_8916()
160 p2[1] = (qfprom_cdata[0] & MSM8916_S1_P2_MASK) >> MSM8916_S1_P2_SHIFT; in calibrate_8916()
161 p2[2] = (qfprom_cdata[1] & MSM8916_S2_P2_MASK) >> MSM8916_S2_P2_SHIFT; in calibrate_8916()
162 p2[3] = (qfprom_cdata[1] & MSM8916_S3_P2_MASK) >> MSM8916_S3_P2_SHIFT; in calibrate_8916()
163 p2[4] = (qfprom_cdata[1] & MSM8916_S4_P2_MASK) >> MSM8916_S4_P2_SHIFT; in calibrate_8916()
165 p2[i] = ((base1 + p2[i]) << 3); in calibrate_8916()
180 p2[i] = 780; in calibrate_8916()
185 compute_intercept_slope(priv, p1, p2, mode); in calibrate_8916()
195 u32 p1[11], p2[11]; in calibrate_8974() local
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Dtsens-v1.c83 u32 p1[10], p2[10]; in calibrate_v1() local
98 p2[0] = (qfprom_cdata[0] & S0_P2_MASK) >> S0_P2_SHIFT; in calibrate_v1()
99 p2[1] = (qfprom_cdata[0] & S1_P2_MASK) >> S1_P2_SHIFT; in calibrate_v1()
103 p2[2] = msb << 2 | lsb; in calibrate_v1()
104 p2[3] = (qfprom_cdata[1] & S3_P2_MASK) >> S3_P2_SHIFT; in calibrate_v1()
105 p2[4] = (qfprom_cdata[1] & S4_P2_MASK) >> S4_P2_SHIFT; in calibrate_v1()
106 p2[5] = (qfprom_cdata[2] & S5_P2_MASK) >> S5_P2_SHIFT; in calibrate_v1()
107 p2[6] = (qfprom_cdata[2] & S6_P2_MASK) >> S6_P2_SHIFT; in calibrate_v1()
111 p2[7] = msb << 2 | lsb; in calibrate_v1()
112 p2[8] = (qfprom_cdata[3] & S8_P2_MASK) >> S8_P2_SHIFT; in calibrate_v1()
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Dtsens-common.c38 u32 *p2, u32 mode) in compute_intercept_slope() argument
46 i, p1[i], p2[i]); in compute_intercept_slope()
54 num = p2[i] - p1[i]; in compute_intercept_slope()
/drivers/tty/vt/
Dconsolemap.c227 u16 **p1, *p2; in set_inverse_trans_unicode() local
245 p2 = p1[j]; in set_inverse_trans_unicode()
246 if (!p2) in set_inverse_trans_unicode()
249 glyph = p2[k]; in set_inverse_trans_unicode()
478 u16 **p1, *p2; in con_insert_unipair() local
489 p2 = p1[n = (unicode >> 6) & 0x1f]; in con_insert_unipair()
490 if (!p2) { in con_insert_unipair()
491 p2 = p1[n] = kmalloc_array(64, sizeof(u16), GFP_KERNEL); in con_insert_unipair()
492 if (!p2) return -ENOMEM; in con_insert_unipair()
493 memset(p2, 0xff, 64*sizeof(u16)); /* No glyphs for the characters (yet) */ in con_insert_unipair()
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/drivers/video/fbdev/intelfb/
Dintelfbhw.c666 static int calc_vclock(int index, int m1, int m2, int n, int p1, int p2, in calc_vclock() argument
677 p = ((p1 + 2) * (1 << (p2 + 1))); in calc_vclock()
679 p = ((p1) * (p2 ? 5 : 10)); in calc_vclock()
687 int p1, p2; in intelfbhw_get_p1p2() local
697 p2 = (dpll >> DPLL_I9XX_P2_SHIFT) & DPLL_P2_MASK; in intelfbhw_get_p1p2()
703 p2 = (dpll >> DPLL_P2_SHIFT) & DPLL_P2_MASK; in intelfbhw_get_p1p2()
707 *o_p2 = p2; in intelfbhw_get_p1p2()
716 int i, m1, m2, n, p1, p2; in intelfbhw_print_hw_state() local
731 intelfbhw_get_p1p2(dinfo, hw->vga_pd, &p1, &p2); in intelfbhw_print_hw_state()
734 m1, m2, n, p1, p2); in intelfbhw_print_hw_state()
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/drivers/gpu/drm/gma500/
Dcdv_intel_display.c44 .p2 = {.dot_limit = 200000, .p2_slow = 14, .p2_fast = 14},
59 .p2 = {.dot_limit = 200000, .p2_slow = 14, .p2_fast = 14},
71 .p2 = {.dot_limit = 225000, .p2_slow = 10, .p2_fast = 5},
83 .p2 = {.dot_limit = 225000, .p2_slow = 10, .p2_fast = 5},
95 .p2 = {.dot_limit = 225000, .p2_slow = 10, .p2_fast = 10},
107 .p2 = {.dot_limit = 225000, .p2_slow = 10, .p2_fast = 10},
312 switch (clock->p2) { in cdv_dpll_set_clock_cdv()
326 DRM_ERROR("Bad P2 clock: %d\n", clock->p2); in cdv_dpll_set_clock_cdv()
395 clock->p = clock->p1 * clock->p2; in cdv_intel_clock()
412 clock.p2 = 10; in cdv_intel_find_dp_pll()
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Dpsb_intel_display.c34 .p2 = {.dot_limit = 200000, .p2_slow = 10, .p2_fast = 5},
49 .p2 = {.dot_limit = 112000, .p2_slow = 14, .p2_fast = 7},
69 clock->p = clock->p1 * clock->p2; in psb_intel_clock()
168 switch (clock.p2) { in psb_intel_crtc_mode_set()
236 if (clock.p2 == 7) in psb_intel_crtc_mode_set()
339 clock.p2 = 14; in psb_intel_crtc_clock_get()
357 clock.p2 = 4; in psb_intel_crtc_clock_get()
359 clock.p2 = 2; in psb_intel_crtc_clock_get()
Dgma_display.c719 clock.p2 = limit->p2.p2_fast; in gma_find_best_pll()
721 clock.p2 = limit->p2.p2_slow; in gma_find_best_pll()
723 if (target < limit->p2.dot_limit) in gma_find_best_pll()
724 clock.p2 = limit->p2.p2_slow; in gma_find_best_pll()
726 clock.p2 = limit->p2.p2_fast; in gma_find_best_pll()
Dgma_display.h22 int p1, p2; member
41 struct gma_p2_t p2; member
/drivers/media/usb/pvrusb2/
Dpvrusb2-context.c327 struct pvr2_channel *p2; in pvr2_channel_limit_inputs() local
345 for (p2 = cp->mc_head->mc_first; p2; p2 = p2->mc_next) { in pvr2_channel_limit_inputs()
346 if (p2 == cp) continue; in pvr2_channel_limit_inputs()
347 if (!p2->input_mask) continue; in pvr2_channel_limit_inputs()
348 tmsk &= p2->input_mask; in pvr2_channel_limit_inputs()
Dpvrusb2-ctrl.c362 char *p2; in parse_token() local
381 *valptr = simple_strtol(buf,&p2,0); in parse_token()
383 if (*p2) return -EINVAL; in parse_token()
395 char *p2; in parse_mtoken() local
411 *valptr = simple_strtol(buf,&p2,0); in parse_mtoken()
412 if (*p2) return -EINVAL; in parse_mtoken()
/drivers/cpufreq/
Dbrcmstb-avs-cpufreq.c170 unsigned int p2; member
326 static void brcm_avs_parse_p2(u32 p2, unsigned int *mdiv_p1, in brcm_avs_parse_p2() argument
330 *mdiv_p4 = (p2 >> MDIV_P4_SHIFT) & MDIV_P4_MASK; in brcm_avs_parse_p2()
331 *mdiv_p3 = (p2 >> MDIV_P3_SHIFT) & MDIV_P3_MASK; in brcm_avs_parse_p2()
332 *mdiv_p2 = (p2 >> MDIV_P2_SHIFT) & MDIV_P2_MASK; in brcm_avs_parse_p2()
333 *mdiv_p1 = (p2 >> MDIV_P1_SHIFT) & MDIV_P1_MASK; in brcm_avs_parse_p2()
347 pmap->p2 = args[2]; in brcm_avs_get_pmap()
359 args[2] = pmap->p2; in brcm_avs_set_pmap()
645 brcm_avs_parse_p2(pmap.p2, &mdiv_p1, &mdiv_p2, &mdiv_p3, &mdiv_p4); in show_brcm_avs_pmap()
648 pmap.p1, pmap.p2, ndiv, pdiv, mdiv_p0, mdiv_p1, mdiv_p2, in show_brcm_avs_pmap()
/drivers/misc/cxl/
Dhcalls.c206 u64 p1, u64 p2, u64 p3, u64 p4, u64 *out) in cxl_h_control_function() argument
211 CXL_H9_WAIT_UNTIL_DONE(rc, retbuf, H_CONTROL_CA_FUNCTION, unit_address, op, p1, p2, p3, p4); in cxl_h_control_function()
213 unit_address, OP_STR_AFU(op), p1, p2, p3, p4, retbuf[0], rc); in cxl_h_control_function()
214 trace_cxl_hcall_control_function(unit_address, OP_STR_AFU(op), p1, p2, p3, p4, retbuf[0], rc); in cxl_h_control_function()
479 u64 p1, u64 p2, u64 p3, u64 p4, u64 *out) in cxl_h_control_facility() argument
484 CXL_H9_WAIT_UNTIL_DONE(rc, retbuf, H_CONTROL_CA_FACILITY, unit_address, op, p1, p2, p3, p4); in cxl_h_control_facility()
486 unit_address, OP_STR_CONTROL_ADAPTER(op), p1, p2, p3, p4, retbuf[0], rc); in cxl_h_control_facility()
487 …trace_cxl_hcall_control_facility(unit_address, OP_STR_CONTROL_ADAPTER(op), p1, p2, p3, p4, retbuf[… in cxl_h_control_facility()
Dtrace.h517 TP_PROTO(u64 unit_address, char *fct, u64 p1, u64 p2, u64 p3,
520 TP_ARGS(unit_address, fct, p1, p2, p3, p4, r4, rc),
526 __field(u64, p2)
537 __entry->p2 = p2;
548 __entry->p2,
598 TP_PROTO(u64 unit_address, char *fct, u64 p1, u64 p2, u64 p3,
600 TP_ARGS(unit_address, fct, p1, p2, p3, p4, r4, rc)
646 TP_PROTO(u64 unit_address, char *fct, u64 p1, u64 p2, u64 p3,
648 TP_ARGS(unit_address, fct, p1, p2, p3, p4, r4, rc)
/drivers/auxdisplay/
Dht16k33.c134 uint8_t *p1, *p2; in ht16k33_fb_update() local
138 p2 = fbdev->buffer; in ht16k33_fb_update()
142 if (*(p1++) - *(p2++)) in ht16k33_fb_update()
153 p2 = fbdev->buffer + HT16K33_FB_SIZE - 1; in ht16k33_fb_update()
157 if (*(p1--) - *(p2--)) in ht16k33_fb_update()
163 p2 = fbdev->buffer + first; in ht16k33_fb_update()
164 if (!i2c_smbus_write_i2c_block_data(priv->client, first, len, p2)) in ht16k33_fb_update()
165 memcpy(p1, p2, len); in ht16k33_fb_update()
/drivers/clk/
Dclk-si5351.c37 unsigned long p2; member
139 params->p2 = 0; in si5351_read_parameters()
145 params->p2 = ((buf[5] & 0x0f) << 16) | (buf[6] << 8) | buf[7]; in si5351_read_parameters()
171 ((params->p2 & 0xf0000) >> 16); in si5351_write_parameters()
172 buf[6] = ((params->p2 & 0x0ff00) >> 8) & 0xff; in si5351_write_parameters()
173 buf[7] = params->p2 & 0xff; in si5351_write_parameters()
432 rate += hwdata->params.p2; in si5351_pll_recalc_rate()
439 hwdata->params.p1, hwdata->params.p2, hwdata->params.p3, in si5351_pll_recalc_rate()
481 hwdata->params.p2 = (128 * b) % c; in si5351_pll_round_rate()
516 (hwdata->params.p2 == 0) ? SI5351_CLK_INTEGER_MODE : 0); in si5351_pll_set_rate()
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/drivers/net/wireless/ath/
Ddfs_pri_detector.c231 struct pulse_elem *p2; in pseq_handler_create_sequences() local
254 p2 = p; in pseq_handler_create_sequences()
258 list_for_each_entry_continue(p2, &pde->pulses, head) { in pseq_handler_create_sequences()
260 if (p2->ts < min_valid_ts) in pseq_handler_create_sequences()
264 factor = pde_get_multiple(ps.last_ts - p2->ts, ps.pri, in pseq_handler_create_sequences()
268 ps.first_ts = p2->ts; in pseq_handler_create_sequences()
/drivers/clk/st/
Dclkgen-fsyn.c628 uint64_t p, p1, p2; /* pe value */ in clk_fs660c32_dig_get_params() local
639 input, output, &p2, fs); in clk_fs660c32_dig_get_params()
642 if (r1 && r2 && (p1 > p2)) in clk_fs660c32_dig_get_params()
662 p2 = fs->pe - 2; in clk_fs660c32_dig_get_params()
664 p2 = 0; in clk_fs660c32_dig_get_params()
666 for (; p2 < 32768ll && (p2 <= (fs->pe + 2)); p2++) { in clk_fs660c32_dig_get_params()
667 fs_tmp.pe = (unsigned long)p2; in clk_fs660c32_dig_get_params()
675 fs->pe = (unsigned long)p2; in clk_fs660c32_dig_get_params()
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
Didle.fuc63 bclr $flags $p2
72 bset $flags $p2
79 bra $p2 #idle_loop
/drivers/gpu/drm/radeon/
Dradeon_legacy_tv.c431 u16 p1, p2, h_inc; in radeon_legacy_tv_init_restarts() local
458 p2 = hor_timing_NTSC[H_TABLE_POS2]; in radeon_legacy_tv_init_restarts()
461 p2 = hor_timing_PAL[H_TABLE_POS2]; in radeon_legacy_tv_init_restarts()
465 p2 = (u16)((int)p2 - h_offset); in radeon_legacy_tv_init_restarts()
468 p2 != tv_dac->tv.h_code_timing[H_TABLE_POS2]); in radeon_legacy_tv_init_restarts()
471 tv_dac->tv.h_code_timing[H_TABLE_POS2] = p2; in radeon_legacy_tv_init_restarts()
493 const_ptr->def_restart, tv_dac->h_pos, tv_dac->v_pos, p1, p2, restart); in radeon_legacy_tv_init_restarts()
/drivers/isdn/mISDN/
Dhwchannel.c167 memset(bch->fill, cq->p2 & 0xff, MISDN_BCH_FILL_SIZE); in mISDN_ctrl_bchannel()
175 cq->p2 = bch->dropcnt; in mISDN_ctrl_bchannel()
183 if (cq->p2 > MISDN_CTRL_RX_SIZE_IGNORE) in mISDN_ctrl_bchannel()
184 bch->next_maxlen = cq->p2; in mISDN_ctrl_bchannel()
189 cq->p2 = bch->maxlen; in mISDN_ctrl_bchannel()
/drivers/net/wireless/marvell/libertas/
Ddebugfs.c62 int p1, p2, p3, p4, p5, p6; in lbs_sleepparams_write() local
69 ret = sscanf(buf, "%d %d %d %d %d %d", &p1, &p2, &p3, &p4, &p5, &p6); in lbs_sleepparams_write()
75 sp.sp_offset = p2; in lbs_sleepparams_write()
861 char *p2; in lbs_debugfs_write() local
881 p2 = strchr(p, '='); in lbs_debugfs_write()
882 if (!p2) in lbs_debugfs_write()
884 p2++; in lbs_debugfs_write()
885 r = simple_strtoul(p2, NULL, 0); in lbs_debugfs_write()
/drivers/atm/
Dfirestream.c628 u32 cmd, u32 p1, u32 p2, u32 p3) in submit_queue() argument
635 qe->p1 = p2; in submit_queue()
636 qe->p2 = p3; in submit_queue()
642 pq[qp].p1 = p2; in submit_queue()
643 pq[qp].p2 = p3; in submit_queue()
655 u32 cmd, u32 p1, u32 p2, u32 p3) in submit_command() argument
659 write_fs (dev, CMDR2, p2); in submit_command()
677 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe)); in process_return_queue()
705 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe)); in process_txdone_queue()
709 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe)); in process_txdone_queue()
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/drivers/gpu/drm/i915/display/
Dintel_dpll_mgr.c1165 unsigned int *p2 /* out */) in skl_wrpll_get_multipliers() argument
1174 *p2 = half; in skl_wrpll_get_multipliers()
1178 *p2 = 2; in skl_wrpll_get_multipliers()
1182 *p2 = 2; in skl_wrpll_get_multipliers()
1186 *p2 = 2; in skl_wrpll_get_multipliers()
1191 *p2 = p / 3; in skl_wrpll_get_multipliers()
1195 *p2 = 1; in skl_wrpll_get_multipliers()
1199 *p2 = 5; in skl_wrpll_get_multipliers()
1203 *p2 = 3; in skl_wrpll_get_multipliers()
1207 *p2 = 5; in skl_wrpll_get_multipliers()
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/drivers/misc/vmw_vmci/
Dvmci_event.c49 struct vmci_subscription *cur, *p2; in vmci_event_exit() local
50 list_for_each_entry_safe(cur, p2, &subscriber_array[e], node) { in vmci_event_exit()

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