Lines Matching refs:t0

117 	li	t0, CAUSEF_IV
118 	mtc0	t0, CP0_CAUSE
121 	li	t0, ST0_CU1 | ST0_CU0 | ST0_BEV | STATUS_BITDEPS
122 	mtc0	t0, CP0_STATUS
135 	li	t0, 0xff
136 	sw	t0, GCR_CL_COHERENCE_OFS(v1)
140 1:	mfc0	t0, CP0_CONFIG
141 	ori	t0, 0x7
142 	xori	t0, 0x7
143 	or	t0, t0, s0
144 	mtc0	t0, CP0_CONFIG
148 	PTR_LA	t0, 1f
149 	jr	t0
231 	has_mt	t0, 3f
247 1:	mfc0	t0, CP0_MVPCONTROL
248 	ori	t0, t0, MVPCONTROL_VPC
249 	mtc0	t0, CP0_MVPCONTROL
252 	mfc0	t0, CP0_MVPCONF0
253 	srl	t0, t0, MVPCONF0_PVPE_SHIFT
254 	andi	t0, t0, (MVPCONF0_PVPE >> MVPCONF0_PVPE_SHIFT)
255 	addiu	ta3, t0, 1
258 	beqz	t0, 2f
272 	li	t0, VPECONF0_MVP
274 	or	t0, t0, t1
275 	mttc0	t0, CP0_VPECONF0
281 	li	t0, TCHALT_H
282 	mttc0	t0, CP0_TCHALT
286 	slt	t0, ta1, ta3
287 	bnez	t0, 1b
291 2:	mfc0	t0, CP0_MVPCONTROL
292 	xori	t0, t0, MVPCONTROL_VPC
293 	mtc0	t0, CP0_MVPCONTROL
309 	cmgcrb	t0
310 	lw	t0, GCR_CL_ID_OFS(t0)
312 	mul	t0, t0, t1
315 	PTR_ADDU v0, t0, t1
367 	has_vp	t0, 5f
388 	has_mt	t0, 5f
410 1:	andi	t0, ta2, 1
411 	beqz	t0, 2f
415 	mfc0	t0, CP0_VPECONTROL
416 	ori	t0, t0, VPECONTROL_TARGTC
417 	xori	t0, t0, VPECONTROL_TARGTC
418 	or	t0, t0, ta1
419 	mtc0	t0, CP0_VPECONTROL
427 	mftc0	t0, CP0_TCHALT
428 	beqz	t0, 2f
432 	li	t0, VPEBOOTCFG_SIZE
433 	mul	t0, t0, ta1
434 	addu	t0, t0, ta3
437 	lw	t1, VPEBOOTCFG_PC(t0)
441 	lw	t1, VPEBOOTCFG_SP(t0)
445 	lw	t1, VPEBOOTCFG_GP(t0)
449 	mfc0	t0, CP0_CONFIG
450 	mttc0	t0, CP0_CONFIG
456 	mfc0	t0, CP0_CONFIG, 3
457 	and	t0, t0, MIPS_CONF3_SC
458 	beqz	t0, 3f
460 	mfc0    t0, CP0_SEGCTL0
461 	mttc0	t0, CP0_SEGCTL0
462 	mfc0    t0, CP0_SEGCTL1
463 	mttc0	t0, CP0_SEGCTL1
464 	mfc0    t0, CP0_SEGCTL2
465 	mttc0	t0, CP0_SEGCTL2
472 	mftc0	t0, CP0_TCSTATUS
474 	and	t0, t0, t1
475 	ori	t0, t0, TCSTATUS_A
476 	mttc0	t0, CP0_TCSTATUS
482 	mftc0	t0, CP0_VPECONF0
483 	ori	t0, t0, VPECONF0_VPA
484 	mttc0	t0, CP0_VPECONF0
502 	li	t0, 1
503 	sll	t0, t0, a1
504 	and	t0, t0, t8
505 	bnez	t0, 2f
509 	li	t0, TCHALT_H
510 	mtc0	t0, CP0_TCHALT
511 	PTR_LA	t0, 1f
512 1:	jr.hb	t0
541 	_EXT	t0, v0, MIPS_CONF1_IL_SHF, MIPS_CONF1_IL_SZ
542 	beqz	t0, icache_done
544 	sllv	t0, t1, t0
556 	mul	t1, t1, t0
562 	PTR_ADD	a0, a0, t0
568 	_EXT	t0, v0, MIPS_CONF1_DL_SHF, MIPS_CONF1_DL_SZ
569 	beqz	t0, dcache_done
571 	sllv	t0, t1, t0
583 	mul	t1, t1, t0
588 	PTR_SUBU a1, a1, t0
591 	 PTR_ADD a0, a0, t0