1270 	u32 rt, rd, sel;  in kvm_mips_emulate_CP0()  local
1312 		sel = inst.c0r_format.sel;  in kvm_mips_emulate_CP0()
1317 			cop0->stat[rd][sel]++;  in kvm_mips_emulate_CP0()
1320 			if ((rd == MIPS_CP0_COUNT) && (sel == 0)) {  in kvm_mips_emulate_CP0()
1323 			} else if ((rd == MIPS_CP0_ERRCTL) && (sel == 0)) {  in kvm_mips_emulate_CP0()
1329 				vcpu->arch.gprs[rt] = (s32)cop0->reg[rd][sel];  in kvm_mips_emulate_CP0()
1337 				      KVM_TRACE_COP0(rd, sel),  in kvm_mips_emulate_CP0()
1342 			vcpu->arch.gprs[rt] = cop0->reg[rd][sel];  in kvm_mips_emulate_CP0()
1345 				      KVM_TRACE_COP0(rd, sel),  in kvm_mips_emulate_CP0()
1351 			cop0->stat[rd][sel]++;  in kvm_mips_emulate_CP0()
1354 				      KVM_TRACE_COP0(rd, sel),  in kvm_mips_emulate_CP0()
1365 			if ((rd == MIPS_CP0_PRID) && (sel == 1)) {  in kvm_mips_emulate_CP0()
1372 			} else if (rd == MIPS_CP0_TLB_HI && sel == 0) {  in kvm_mips_emulate_CP0()
1377 			else if ((rd == MIPS_CP0_COUNT) && (sel == 0)) {  in kvm_mips_emulate_CP0()
1380 			} else if ((rd == MIPS_CP0_COMPARE) && (sel == 0)) {  in kvm_mips_emulate_CP0()
1386 			} else if ((rd == MIPS_CP0_STATUS) && (sel == 0)) {  in kvm_mips_emulate_CP0()
1458 			} else if ((rd == MIPS_CP0_CONFIG) && (sel == 5)) {  in kvm_mips_emulate_CP0()
1495 			} else if ((rd == MIPS_CP0_CAUSE) && (sel == 0)) {  in kvm_mips_emulate_CP0()
1510 			} else if ((rd == MIPS_CP0_HWRENA) && (sel == 0)) {  in kvm_mips_emulate_CP0()
1519 				cop0->reg[rd][sel] = vcpu->arch.gprs[rt] & mask;  in kvm_mips_emulate_CP0()
1521 				cop0->reg[rd][sel] = vcpu->arch.gprs[rt];  in kvm_mips_emulate_CP0()
1530 				vcpu->arch.pc, rt, rd, sel);  in kvm_mips_emulate_CP0()
1532 				      KVM_TRACE_COP0(rd, sel),  in kvm_mips_emulate_CP0()
2520 		int sel = inst.r_format.re & 0x7;  in kvm_mips_handle_ri()  local
2558 		trace_kvm_hwr(vcpu, KVM_TRACE_RDHWR, KVM_TRACE_HWR(rd, sel),  in kvm_mips_handle_ri()