31 #define T0		8  macro
38 #define T0		12  macro
305 	UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, pc), K1);  in kvm_mips_build_enter_guest()
306 	UASM_i_MTC0(&p, T0, C0_EPC);  in kvm_mips_build_enter_guest()
345 		uasm_i_mfc0(&p, T0, C0_GUESTCTL1);  in kvm_mips_build_enter_guest()
347 		uasm_i_ext(&p, T1, T0, MIPS_GCTL1_ID_SHIFT,  in kvm_mips_build_enter_guest()
349 		uasm_i_ins(&p, T0, T1, MIPS_GCTL1_RID_SHIFT,  in kvm_mips_build_enter_guest()
351 		uasm_i_mtc0(&p, T0, C0_GUESTCTL1);  in kvm_mips_build_enter_guest()
369 	UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, cop0), K1);  in kvm_mips_build_enter_guest()
370 	UASM_i_LW(&p, T0, offsetof(struct mips_coproc, reg[MIPS_CP0_STATUS][0]),  in kvm_mips_build_enter_guest()
371 		  T0);  in kvm_mips_build_enter_guest()
372 	uasm_i_andi(&p, T0, T0, KSU_USER | ST0_ERL | ST0_EXL);  in kvm_mips_build_enter_guest()
373 	uasm_i_xori(&p, T0, T0, KSU_USER);  in kvm_mips_build_enter_guest()
374 	uasm_il_bnez(&p, &r, T0, label_kernel_asid);  in kvm_mips_build_enter_guest()
616 	uasm_i_mfhi(&p, T0);  in kvm_mips_build_exit()
617 	UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, hi), K1);  in kvm_mips_build_exit()
619 	uasm_i_mflo(&p, T0);  in kvm_mips_build_exit()
620 	UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, lo), K1);  in kvm_mips_build_exit()
625 	UASM_i_MFC0(&p, T0, scratch_tmp[0], scratch_tmp[1]);  in kvm_mips_build_exit()
626 	UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, gprs[K1]), K1);  in kvm_mips_build_exit()
687 		uasm_i_cfc1(&p, T0, 31);  in kvm_mips_build_exit()
688 		uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.fcr31),  in kvm_mips_build_exit()
699 		uasm_i_mfc0(&p, T0, C0_CONFIG5);  in kvm_mips_build_exit()
700 		uasm_i_ext(&p, T0, T0, 27, 1); /* MIPS_CONF5_MSAEN */  in kvm_mips_build_exit()
701 		uasm_il_beqz(&p, &r, T0, label_msa_1);  in kvm_mips_build_exit()
703 		uasm_i_cfcmsa(&p, T0, MSA_CSR);  in kvm_mips_build_exit()
704 		uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.msacsr),  in kvm_mips_build_exit()
748 		uasm_i_mfc0(&p, T0, C0_GUESTCTL1);  in kvm_mips_build_exit()
750 		uasm_i_ins(&p, T0, ZERO, MIPS_GCTL1_RID_SHIFT,  in kvm_mips_build_exit()
752 		uasm_i_mtc0(&p, T0, C0_GUESTCTL1);  in kvm_mips_build_exit()
845 	uasm_i_andi(&p, T0, V0, RESUME_HOST);  in kvm_mips_build_ret_from_exit()
846 	uasm_il_bnez(&p, &r, T0, label_return_to_host);  in kvm_mips_build_ret_from_exit()
876 	UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, guest_ebase), K1);  in kvm_mips_build_ret_to_guest()
884 	build_set_exc_base(&p, T0);  in kvm_mips_build_ret_to_guest()