Lines Matching refs:buffer
181 __u64 buffer; in misaligned_load() local
187 if (__copy_user(&buffer, (const void *)(int)address, (1 << width_shift)) > 0) { in misaligned_load()
193 regs->regs[destreg] = (__u64)(__s64) *(__s16 *) &buffer; in misaligned_load()
195 regs->regs[destreg] = (__u64) *(__u16 *) &buffer; in misaligned_load()
199 regs->regs[destreg] = (__u64)(__s64) *(__s32 *) &buffer; in misaligned_load()
202 regs->regs[destreg] = buffer; in misaligned_load()
255 __u64 buffer; in misaligned_store() local
263 *(__u16 *) &buffer = (__u16) regs->regs[srcreg]; in misaligned_store()
266 *(__u32 *) &buffer = (__u32) regs->regs[srcreg]; in misaligned_store()
269 buffer = regs->regs[srcreg]; in misaligned_store()
277 if (__copy_user((void *)(int)address, &buffer, (1 << width_shift)) > 0) { in misaligned_store()
327 __u64 buffer; in misaligned_fpu_load() local
334 if (__copy_user(&buffer, (const void *)(int)address, (1 << width_shift)) > 0) { in misaligned_fpu_load()
348 buflo = *(__u32*) &buffer; in misaligned_fpu_load()
349 bufhi = *(1 + (__u32*) &buffer); in misaligned_fpu_load()
399 __u64 buffer; in misaligned_fpu_store() local
442 *(__u32*) &buffer = buflo; in misaligned_fpu_store()
443 *(1 + (__u32*) &buffer) = bufhi; in misaligned_fpu_store()
444 if (__copy_user((void *)(int)address, &buffer, (1 << width_shift)) > 0) { in misaligned_fpu_store()