47 #define SSCR0_DataSize(x)  ((x) - 1)	/* Data Size Select [4..16] */  argument
54 #define SSCR0_SCR(x)	((x) << 8)	/* Serial Clock Rate (mask) */  argument
62 #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24)	/* Time slots per frame [1..8] */  argument
90 #define SSCR1_TxTresh(x) (((x) - 1) << 6)	/* level [1..16] */  argument
92 #define SSCR1_RxTresh(x) (((x) - 1) << 10)	/* level [1..16] */  argument
101 #define CE4100_SSCR1_TxTresh(x) (((x) - 1) << 6)	/* level [1..4] */  argument
103 #define CE4100_SSCR1_RxTresh(x) (((x) - 1) << 10)	/* level [1..4] */  argument
107 #define QUARK_X1000_SSCR0_DataSize(x)	((x) - 1)	/* Data Size Select [4..32] */  argument
118 #define QUARK_X1000_SSCR1_TxTresh(x) (((x) - 1) << 6)	/* level [1..32] */  argument
120 #define QUARK_X1000_SSCR1_RxTresh(x) (((x) - 1) << 11)	/* level [1..32] */  argument
153 #define SSPSP_SCMODE(x)		((x) << 0)	/* Serial Bit Rate Clock Mode */  argument
156 #define SSPSP_STRTDLY(x)	((x) << 4)	/* Start Delay */  argument
157 #define SSPSP_DMYSTRT(x)	((x) << 7)	/* Dummy Start */  argument
158 #define SSPSP_SFRMDLY(x)	((x) << 9)	/* Serial Frame Delay */  argument
159 #define SSPSP_SFRMWDTH(x)	((x) << 16)	/* Serial Frame Width */  argument
160 #define SSPSP_DMYSTOP(x)	((x) << 23)	/* Dummy Stop */  argument
164 #define SSPSP_EDMYSTRT(x)	((x) << 26)     /* Extended Dummy Start */  argument
165 #define SSPSP_EDMYSTOP(x)	((x) << 28)     /* Extended Dummy Stop */  argument
169 #define SSACD_ACPS(x)		((x) << 4)	/* Audio clock PLL select */  argument
170 #define SSACD_ACDS(x)		((x) << 0)	/* Audio clock divider select */  argument
183 #define SSITF_TxLoThresh(x)	(((x) - 1) << 8)  argument
184 #define SSITF_TxHiThresh(x)	((x) - 1)  argument
187 #define SSIRF_RxThresh(x)	((x) - 1)  argument