502 	u32 val;  in vgic_mmio_read_its_iidr()  local
504 	val = (its->abi_rev << GITS_IIDR_REV_SHIFT) & GITS_IIDR_REV_MASK;  in vgic_mmio_read_its_iidr()
505 	val |= (PRODUCT_ID_KVM << GITS_IIDR_PRODUCTID_SHIFT) | IMPLEMENTER_ARM;  in vgic_mmio_read_its_iidr()
506 	return val;  in vgic_mmio_read_its_iidr()
512 					    unsigned long val)  in vgic_mmio_uaccess_write_its_iidr()  argument
514 	u32 rev = GITS_IIDR_REV(val);  in vgic_mmio_uaccess_write_its_iidr()
1505 				       unsigned long val)  in vgic_mmio_write_its_cbaser()  argument
1512 	its->cbaser = update_64bit_reg(its->cbaser, addr & 7, len, val);  in vgic_mmio_write_its_cbaser()
1566 					unsigned long val)  in vgic_mmio_write_its_cwriter()  argument
1575 	reg = update_64bit_reg(its->cwriter, addr & 7, len, val);  in vgic_mmio_write_its_cwriter()
1605 					      unsigned long val)  in vgic_mmio_uaccess_write_its_creadr()  argument
1617 	cmd_offset = ITS_CMD_OFFSET(val);  in vgic_mmio_uaccess_write_its_creadr()
1655 				      unsigned long val)  in vgic_mmio_write_its_baser()  argument
1681 	reg = update_64bit_reg(*regptr, addr & 7, len, val);  in vgic_mmio_write_its_baser()
1724 				     unsigned long val)  in vgic_mmio_write_its_ctlr()  argument
1732 	if (!its->enabled && (val & GITS_CTLR_ENABLE) &&  in vgic_mmio_write_its_ctlr()
1738 	its->enabled = !!(val & GITS_CTLR_ENABLE);  in vgic_mmio_write_its_ctlr()
1772 			      gpa_t addr, unsigned int len, unsigned long val)  in its_mmio_write_wi()  argument
2139 	u64 val;  in vgic_its_save_ite()  local
2142 	val = ((u64)next_offset << KVM_ITS_ITE_NEXT_SHIFT) |  in vgic_its_save_ite()
2145 	val = cpu_to_le64(val);  in vgic_its_save_ite()
2146 	return kvm_write_guest_lock(kvm, gpa, &val, ite_esz);  in vgic_its_save_ite()
2162 	u64 val;  in vgic_its_restore_ite()  local
2169 	val = *p;  in vgic_its_restore_ite()
2171 	val = le64_to_cpu(val);  in vgic_its_restore_ite()
2173 	coll_id = val & KVM_ITS_ITE_ICID_MASK;  in vgic_its_restore_ite()
2174 	lpi_id = (val & KVM_ITS_ITE_PINTID_MASK) >> KVM_ITS_ITE_PINTID_SHIFT;  in vgic_its_restore_ite()
2182 	offset = val >> KVM_ITS_ITE_NEXT_SHIFT;  in vgic_its_restore_ite()
2283 	u64 val, itt_addr_field;  in vgic_its_save_dte()  local
2288 	val = (1ULL << KVM_ITS_DTE_VALID_SHIFT |  in vgic_its_save_dte()
2292 	val = cpu_to_le64(val);  in vgic_its_save_dte()
2293 	return kvm_write_guest_lock(kvm, ptr, &val, dte_esz);  in vgic_its_save_dte()
2467 	u64 val;  in vgic_its_save_cte()  local
2469 	val = (1ULL << KVM_ITS_CTE_VALID_SHIFT |  in vgic_its_save_cte()
2472 	val = cpu_to_le64(val);  in vgic_its_save_cte()
2473 	return kvm_write_guest_lock(its->dev->kvm, gpa, &val, esz);  in vgic_its_save_cte()
2481 	u64 val;  in vgic_its_restore_cte()  local
2484 	BUG_ON(esz > sizeof(val));  in vgic_its_restore_cte()
2485 	ret = kvm_read_guest_lock(kvm, gpa, &val, esz);  in vgic_its_restore_cte()
2488 	val = le64_to_cpu(val);  in vgic_its_restore_cte()
2489 	if (!(val & KVM_ITS_CTE_VALID_MASK))  in vgic_its_restore_cte()
2492 	target_addr = (u32)(val >> KVM_ITS_CTE_RDBASE_SHIFT);  in vgic_its_restore_cte()
2493 	coll_id = val & KVM_ITS_CTE_ICID_MASK;  in vgic_its_restore_cte()
2519 	u64 val;  in vgic_its_save_collection_table()  local
2543 	val = 0;  in vgic_its_save_collection_table()
2544 	BUG_ON(cte_esz > sizeof(val));  in vgic_its_save_collection_table()
2545 	ret = kvm_write_guest_lock(its->dev->kvm, gpa, &val, cte_esz);  in vgic_its_save_collection_table()