1# SPDX-License-Identifier: GPL-2.0-only 2menu "TI OMAP/AM/DM/DRA Family" 3 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7 4 5config ARCH_OMAP2 6 bool "TI OMAP2" 7 depends on ARCH_MULTI_V6 8 select ARCH_OMAP2PLUS 9 select CPU_V6 10 select SOC_HAS_OMAP2_SDRC 11 12config ARCH_OMAP3 13 bool "TI OMAP3" 14 depends on ARCH_MULTI_V7 15 select ARCH_OMAP2PLUS 16 select ARM_CPU_SUSPEND if PM 17 select OMAP_INTERCONNECT 18 select PM_OPP if PM 19 select PM if CPU_IDLE 20 select SOC_HAS_OMAP2_SDRC 21 select ARM_ERRATA_430973 22 23config ARCH_OMAP4 24 bool "TI OMAP4" 25 depends on ARCH_MULTI_V7 26 select ARCH_OMAP2PLUS 27 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 28 select ARM_CPU_SUSPEND if PM 29 select ARM_ERRATA_720789 30 select ARM_GIC 31 select HAVE_ARM_SCU if SMP 32 select HAVE_ARM_TWD if SMP 33 select OMAP_INTERCONNECT 34 select OMAP_INTERCONNECT_BARRIER 35 select PL310_ERRATA_588369 if CACHE_L2X0 36 select PL310_ERRATA_727915 if CACHE_L2X0 37 select PM_OPP if PM 38 select PM if CPU_IDLE 39 select ARM_ERRATA_754322 40 select ARM_ERRATA_775420 41 select OMAP_INTERCONNECT 42 43config SOC_OMAP5 44 bool "TI OMAP5" 45 depends on ARCH_MULTI_V7 46 select ARCH_OMAP2PLUS 47 select ARM_CPU_SUSPEND if PM 48 select ARM_GIC 49 select HAVE_ARM_SCU if SMP 50 select HAVE_ARM_ARCH_TIMER 51 select ARM_ERRATA_798181 if SMP 52 select OMAP_INTERCONNECT 53 select OMAP_INTERCONNECT_BARRIER 54 select PM_OPP if PM 55 select ZONE_DMA if ARM_LPAE 56 57config SOC_AM33XX 58 bool "TI AM33XX" 59 depends on ARCH_MULTI_V7 60 select ARCH_OMAP2PLUS 61 select ARM_CPU_SUSPEND if PM 62 63config SOC_AM43XX 64 bool "TI AM43x" 65 depends on ARCH_MULTI_V7 66 select ARCH_OMAP2PLUS 67 select ARM_GIC 68 select MACH_OMAP_GENERIC 69 select MIGHT_HAVE_CACHE_L2X0 70 select HAVE_ARM_SCU 71 select GENERIC_CLOCKEVENTS_BROADCAST 72 select HAVE_ARM_TWD 73 select ARM_ERRATA_754322 74 select ARM_ERRATA_775420 75 select OMAP_INTERCONNECT 76 select ARM_CPU_SUSPEND if PM 77 78config SOC_DRA7XX 79 bool "TI DRA7XX" 80 depends on ARCH_MULTI_V7 81 select ARCH_OMAP2PLUS 82 select ARM_CPU_SUSPEND if PM 83 select ARM_GIC 84 select HAVE_ARM_SCU if SMP 85 select HAVE_ARM_ARCH_TIMER 86 select IRQ_CROSSBAR 87 select ARM_ERRATA_798181 if SMP 88 select OMAP_INTERCONNECT 89 select OMAP_INTERCONNECT_BARRIER 90 select PM_OPP if PM 91 select ZONE_DMA if ARM_LPAE 92 select PINCTRL_TI_IODELAY if OF && PINCTRL 93 94config ARCH_OMAP2PLUS 95 bool 96 select ARCH_HAS_BANDGAP 97 select ARCH_HAS_RESET_CONTROLLER 98 select ARCH_OMAP 99 select CLKSRC_MMIO 100 select GENERIC_IRQ_CHIP 101 select GPIOLIB 102 select MACH_OMAP_GENERIC 103 select MEMORY 104 select MFD_SYSCON 105 select OMAP_DM_TIMER 106 select OMAP_GPMC 107 select PINCTRL 108 select SOC_BUS 109 select TI_SYSC 110 select OMAP_IRQCHIP 111 select CLKSRC_TI_32K 112 help 113 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 114 115config OMAP_INTERCONNECT_BARRIER 116 bool 117 select ARM_HEAVY_MB 118 119 120if ARCH_OMAP2PLUS 121 122menu "TI OMAP2/3/4 Specific Features" 123 124config ARCH_OMAP2PLUS_TYPICAL 125 bool "Typical OMAP configuration" 126 default y 127 select AEABI 128 select HIGHMEM 129 select I2C 130 select I2C_OMAP 131 select MENELAUS if ARCH_OMAP2 132 select NEON if CPU_V7 133 select PM 134 select REGULATOR 135 select REGULATOR_FIXED_VOLTAGE 136 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 137 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 138 select VFP 139 help 140 Compile a kernel suitable for booting most boards 141 142config SOC_HAS_OMAP2_SDRC 143 bool "OMAP2 SDRAM Controller support" 144 145config SOC_HAS_REALTIME_COUNTER 146 bool "Real time free running counter" 147 depends on SOC_OMAP5 || SOC_DRA7XX 148 default y 149 150comment "OMAP Core Type" 151 depends on ARCH_OMAP2 152 153config SOC_OMAP2420 154 bool "OMAP2420 support" 155 depends on ARCH_OMAP2 156 default y 157 select OMAP_DM_TIMER 158 select SOC_HAS_OMAP2_SDRC 159 160config SOC_OMAP2430 161 bool "OMAP2430 support" 162 depends on ARCH_OMAP2 163 default y 164 select SOC_HAS_OMAP2_SDRC 165 166config SOC_OMAP3430 167 bool "OMAP3430 support" 168 depends on ARCH_OMAP3 169 default y 170 select SOC_HAS_OMAP2_SDRC 171 172config SOC_TI81XX 173 bool "TI81XX support" 174 depends on ARCH_OMAP3 175 default y 176 177config OMAP_PACKAGE_CBC 178 bool 179 180config OMAP_PACKAGE_CBB 181 bool 182 183config OMAP_PACKAGE_CUS 184 bool 185 186config OMAP_PACKAGE_CBP 187 bool 188 189comment "OMAP Legacy Platform Data Board Type" 190 depends on ARCH_OMAP2PLUS 191 192config MACH_OMAP_GENERIC 193 bool 194 195config MACH_OMAP2_TUSB6010 196 bool 197 depends on ARCH_OMAP2 && SOC_OMAP2420 198 default y if MACH_NOKIA_N8X0 199 200config MACH_OMAP3517EVM 201 bool "OMAP3517/ AM3517 EVM board" 202 depends on ARCH_OMAP3 203 default y 204 205config MACH_OMAP3_PANDORA 206 bool "OMAP3 Pandora" 207 depends on ARCH_OMAP3 208 default y 209 select OMAP_PACKAGE_CBB 210 211config MACH_NOKIA_N810 212 bool 213 214config MACH_NOKIA_N810_WIMAX 215 bool 216 217config MACH_NOKIA_N8X0 218 bool "Nokia N800/N810" 219 depends on SOC_OMAP2420 220 default y 221 select MACH_NOKIA_N810 222 select MACH_NOKIA_N810_WIMAX 223 224config OMAP3_SDRC_AC_TIMING 225 bool "Enable SDRC AC timing register changes" 226 depends on ARCH_OMAP3 227 help 228 If you know that none of your system initiators will attempt to 229 access SDRAM during CORE DVFS, select Y here. This should boost 230 SDRAM performance at lower CORE OPPs. There are relatively few 231 users who will wish to say yes at this point - almost everyone will 232 wish to say no. Selecting yes without understanding what is 233 going on could result in system crashes; 234 235endmenu 236 237endif 238 239config OMAP5_ERRATA_801819 240 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely" 241 depends on SOC_OMAP5 || SOC_DRA7XX 242 help 243 A livelock can occur in the L2 cache arbitration that might prevent 244 a snoop from completing. Under certain conditions this can cause the 245 system to deadlock. 246 247endmenu 248