1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_CPUFEATURE_H
3 #define _ASM_X86_CPUFEATURE_H
4
5 #include <asm/processor.h>
6
7 #if defined(__KERNEL__) && !defined(__ASSEMBLY__)
8
9 #include <asm/asm.h>
10 #include <linux/bitops.h>
11
12 enum cpuid_leafs
13 {
14 CPUID_1_EDX = 0,
15 CPUID_8000_0001_EDX,
16 CPUID_8086_0001_EDX,
17 CPUID_LNX_1,
18 CPUID_1_ECX,
19 CPUID_C000_0001_EDX,
20 CPUID_8000_0001_ECX,
21 CPUID_LNX_2,
22 CPUID_LNX_3,
23 CPUID_7_0_EBX,
24 CPUID_D_1_EAX,
25 CPUID_LNX_4,
26 CPUID_7_1_EAX,
27 CPUID_8000_0008_EBX,
28 CPUID_6_EAX,
29 CPUID_8000_000A_EDX,
30 CPUID_7_ECX,
31 CPUID_8000_0007_EBX,
32 CPUID_7_EDX,
33 CPUID_8000_001F_EAX,
34 CPUID_8000_0021_EAX,
35 };
36
37 #ifdef CONFIG_X86_FEATURE_NAMES
38 extern const char * const x86_cap_flags[NCAPINTS*32];
39 extern const char * const x86_power_flags[32];
40 #define X86_CAP_FMT "%s"
41 #define x86_cap_flag(flag) x86_cap_flags[flag]
42 #else
43 #define X86_CAP_FMT "%d:%d"
44 #define x86_cap_flag(flag) ((flag) >> 5), ((flag) & 31)
45 #endif
46
47 /*
48 * In order to save room, we index into this array by doing
49 * X86_BUG_<name> - NCAPINTS*32.
50 */
51 extern const char * const x86_bug_flags[NBUGINTS*32];
52
53 #define test_cpu_cap(c, bit) \
54 arch_test_bit(bit, (unsigned long *)((c)->x86_capability))
55
56 /*
57 * There are 32 bits/features in each mask word. The high bits
58 * (selected with (bit>>5) give us the word number and the low 5
59 * bits give us the bit/feature number inside the word.
60 * (1UL<<((bit)&31) gives us a mask for the feature_bit so we can
61 * see if it is set in the mask word.
62 */
63 #define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \
64 (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
65
66 /*
67 * {REQUIRED,DISABLED}_MASK_CHECK below may seem duplicated with the
68 * following BUILD_BUG_ON_ZERO() check but when NCAPINTS gets changed, all
69 * header macros which use NCAPINTS need to be changed. The duplicated macro
70 * use causes the compiler to issue errors for all headers so that all usage
71 * sites can be corrected.
72 */
73 #define REQUIRED_MASK_BIT_SET(feature_bit) \
74 ( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
75 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \
76 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \
77 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \
78 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 4, feature_bit) || \
79 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 5, feature_bit) || \
80 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 6, feature_bit) || \
81 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 7, feature_bit) || \
82 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 8, feature_bit) || \
83 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 9, feature_bit) || \
84 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 10, feature_bit) || \
85 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 11, feature_bit) || \
86 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 12, feature_bit) || \
87 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 13, feature_bit) || \
88 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 14, feature_bit) || \
89 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) || \
90 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) || \
91 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) || \
92 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) || \
93 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 19, feature_bit) || \
94 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 20, feature_bit) || \
95 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 21, feature_bit) || \
96 REQUIRED_MASK_CHECK || \
97 BUILD_BUG_ON_ZERO(NCAPINTS != 22))
98
99 #define DISABLED_MASK_BIT_SET(feature_bit) \
100 ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \
101 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 1, feature_bit) || \
102 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 2, feature_bit) || \
103 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 3, feature_bit) || \
104 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 4, feature_bit) || \
105 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 5, feature_bit) || \
106 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 6, feature_bit) || \
107 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 7, feature_bit) || \
108 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 8, feature_bit) || \
109 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 9, feature_bit) || \
110 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 10, feature_bit) || \
111 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 11, feature_bit) || \
112 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 12, feature_bit) || \
113 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 13, feature_bit) || \
114 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 14, feature_bit) || \
115 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) || \
116 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) || \
117 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) || \
118 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) || \
119 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 19, feature_bit) || \
120 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 20, feature_bit) || \
121 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 21, feature_bit) || \
122 DISABLED_MASK_CHECK || \
123 BUILD_BUG_ON_ZERO(NCAPINTS != 22))
124
125 #define cpu_has(c, bit) \
126 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
127 test_cpu_cap(c, bit))
128
129 #define this_cpu_has(bit) \
130 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
131 x86_this_cpu_test_bit(bit, \
132 (unsigned long __percpu *)&cpu_info.x86_capability))
133
134 /*
135 * This macro is for detection of features which need kernel
136 * infrastructure to be used. It may *not* directly test the CPU
137 * itself. Use the cpu_has() family if you want true runtime
138 * testing of CPU features, like in hypervisor code where you are
139 * supporting a possible guest feature where host support for it
140 * is not relevant.
141 */
142 #define cpu_feature_enabled(bit) \
143 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
144
145 #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
146
147 #define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
148
149 extern void setup_clear_cpu_cap(unsigned int bit);
150 extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);
151
152 #define setup_force_cpu_cap(bit) do { \
153 set_cpu_cap(&boot_cpu_data, bit); \
154 set_bit(bit, (unsigned long *)cpu_caps_set); \
155 } while (0)
156
157 #define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit)
158
159 #if defined(__clang__) && !defined(CONFIG_CC_HAS_ASM_GOTO)
160
161 /*
162 * Workaround for the sake of BPF compilation which utilizes kernel
163 * headers, but clang does not support ASM GOTO and fails the build.
164 */
165 #ifndef __BPF_TRACING__
166 #warning "Compiler lacks ASM_GOTO support. Add -D __BPF_TRACING__ to your compiler arguments"
167 #endif
168
169 #define static_cpu_has(bit) boot_cpu_has(bit)
170
171 #else
172
173 /*
174 * Static testing of CPU features. Used the same as boot_cpu_has(). It
175 * statically patches the target code for additional performance. Use
176 * static_cpu_has() only in fast paths, where every cycle counts. Which
177 * means that the boot_cpu_has() variant is already fast enough for the
178 * majority of cases and you should stick to using it as it is generally
179 * only two instructions: a RIP-relative MOV and a TEST.
180 */
_static_cpu_has(u16 bit)181 static __always_inline bool _static_cpu_has(u16 bit)
182 {
183 asm_volatile_goto("1: jmp 6f\n"
184 "2:\n"
185 ".skip -(((5f-4f) - (2b-1b)) > 0) * "
186 "((5f-4f) - (2b-1b)),0x90\n"
187 "3:\n"
188 ".section .altinstructions,\"a\"\n"
189 " .long 1b - .\n" /* src offset */
190 " .long 4f - .\n" /* repl offset */
191 " .word %P[always]\n" /* always replace */
192 " .byte 3b - 1b\n" /* src len */
193 " .byte 5f - 4f\n" /* repl len */
194 " .byte 3b - 2b\n" /* pad len */
195 ".previous\n"
196 ".section .altinstr_replacement,\"ax\"\n"
197 "4: jmp %l[t_no]\n"
198 "5:\n"
199 ".previous\n"
200 ".section .altinstructions,\"a\"\n"
201 " .long 1b - .\n" /* src offset */
202 " .long 0\n" /* no replacement */
203 " .word %P[feature]\n" /* feature bit */
204 " .byte 3b - 1b\n" /* src len */
205 " .byte 0\n" /* repl len */
206 " .byte 0\n" /* pad len */
207 ".previous\n"
208 ".section .altinstr_aux,\"ax\"\n"
209 "6:\n"
210 " testb %[bitnum],%[cap_byte]\n"
211 " jnz %l[t_yes]\n"
212 " jmp %l[t_no]\n"
213 ".previous\n"
214 : : [feature] "i" (bit),
215 [always] "i" (X86_FEATURE_ALWAYS),
216 [bitnum] "i" (1 << (bit & 7)),
217 [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
218 : : t_yes, t_no);
219 t_yes:
220 return true;
221 t_no:
222 return false;
223 }
224
225 #define static_cpu_has(bit) \
226 ( \
227 __builtin_constant_p(boot_cpu_has(bit)) ? \
228 boot_cpu_has(bit) : \
229 _static_cpu_has(bit) \
230 )
231 #endif
232
233 #define cpu_has_bug(c, bit) cpu_has(c, (bit))
234 #define set_cpu_bug(c, bit) set_cpu_cap(c, (bit))
235 #define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit))
236
237 #define static_cpu_has_bug(bit) static_cpu_has((bit))
238 #define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit))
239 #define boot_cpu_set_bug(bit) set_cpu_cap(&boot_cpu_data, (bit))
240
241 #define MAX_CPU_FEATURES (NCAPINTS * 32)
242 #define cpu_have_feature boot_cpu_has
243
244 #define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X"
245 #define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \
246 boot_cpu_data.x86_model
247
248 #endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
249 #endif /* _ASM_X86_CPUFEATURE_H */
250