1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
4 *
5 * Author: Fabio Estevam <fabio.estevam@freescale.com>
6 */
7
8 /*
9 * This machine is known as:
10 * - i.MX27 3-Stack Development System
11 * - i.MX27 Platform Development Kit (i.MX27 PDK)
12 */
13
14 #include <linux/platform_device.h>
15 #include <linux/gpio.h>
16 #include <linux/irq.h>
17 #include <linux/usb/otg.h>
18 #include <linux/usb/ulpi.h>
19 #include <linux/delay.h>
20 #include <linux/mfd/mc13783.h>
21 #include <linux/spi/spi.h>
22 #include <linux/regulator/machine.h>
23 #include <linux/spi/l4f00242t03.h>
24
25
26 #include <asm/mach-types.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach/time.h>
29
30 #include "3ds_debugboard.h"
31 #include "common.h"
32 #include "devices-imx27.h"
33 #include "ehci.h"
34 #include "hardware.h"
35 #include "iomux-mx27.h"
36 #include "ulpi.h"
37
38 #define SD1_EN_GPIO IMX_GPIO_NR(2, 25)
39 #define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23)
40 #define SPI2_SS0 IMX_GPIO_NR(4, 21)
41 #define PMIC_INT IMX_GPIO_NR(3, 14)
42 #define SPI1_SS0 IMX_GPIO_NR(4, 28)
43 #define SD1_CD IMX_GPIO_NR(2, 26)
44 #define LCD_RESET IMX_GPIO_NR(1, 3)
45 #define LCD_ENABLE IMX_GPIO_NR(1, 31)
46
47 static const int mx27pdk_pins[] __initconst = {
48 /* UART1 */
49 PE12_PF_UART1_TXD,
50 PE13_PF_UART1_RXD,
51 PE14_PF_UART1_CTS,
52 PE15_PF_UART1_RTS,
53 /* FEC */
54 PD0_AIN_FEC_TXD0,
55 PD1_AIN_FEC_TXD1,
56 PD2_AIN_FEC_TXD2,
57 PD3_AIN_FEC_TXD3,
58 PD4_AOUT_FEC_RX_ER,
59 PD5_AOUT_FEC_RXD1,
60 PD6_AOUT_FEC_RXD2,
61 PD7_AOUT_FEC_RXD3,
62 PD8_AF_FEC_MDIO,
63 PD9_AIN_FEC_MDC,
64 PD10_AOUT_FEC_CRS,
65 PD11_AOUT_FEC_TX_CLK,
66 PD12_AOUT_FEC_RXD0,
67 PD13_AOUT_FEC_RX_DV,
68 PD14_AOUT_FEC_RX_CLK,
69 PD15_AOUT_FEC_COL,
70 PD16_AIN_FEC_TX_ER,
71 PF23_AIN_FEC_TX_EN,
72 /* SDHC1 */
73 PE18_PF_SD1_D0,
74 PE19_PF_SD1_D1,
75 PE20_PF_SD1_D2,
76 PE21_PF_SD1_D3,
77 PE22_PF_SD1_CMD,
78 PE23_PF_SD1_CLK,
79 SD1_EN_GPIO | GPIO_GPIO | GPIO_OUT,
80 /* OTG */
81 OTG_PHY_RESET_GPIO | GPIO_GPIO | GPIO_OUT,
82 PC7_PF_USBOTG_DATA5,
83 PC8_PF_USBOTG_DATA6,
84 PC9_PF_USBOTG_DATA0,
85 PC10_PF_USBOTG_DATA2,
86 PC11_PF_USBOTG_DATA1,
87 PC12_PF_USBOTG_DATA4,
88 PC13_PF_USBOTG_DATA3,
89 PE0_PF_USBOTG_NXT,
90 PE1_PF_USBOTG_STP,
91 PE2_PF_USBOTG_DIR,
92 PE24_PF_USBOTG_CLK,
93 PE25_PF_USBOTG_DATA7,
94 /* CSPI1 */
95 PD31_PF_CSPI1_MOSI,
96 PD30_PF_CSPI1_MISO,
97 PD29_PF_CSPI1_SCLK,
98 PD25_PF_CSPI1_RDY,
99 SPI1_SS0 | GPIO_GPIO | GPIO_OUT,
100 /* CSPI2 */
101 PD22_PF_CSPI2_SCLK,
102 PD23_PF_CSPI2_MISO,
103 PD24_PF_CSPI2_MOSI,
104 SPI2_SS0 | GPIO_GPIO | GPIO_OUT,
105 /* I2C1 */
106 PD17_PF_I2C_DATA,
107 PD18_PF_I2C_CLK,
108 /* PMIC INT */
109 PMIC_INT | GPIO_GPIO | GPIO_IN,
110 /* LCD */
111 PA5_PF_LSCLK,
112 PA6_PF_LD0,
113 PA7_PF_LD1,
114 PA8_PF_LD2,
115 PA9_PF_LD3,
116 PA10_PF_LD4,
117 PA11_PF_LD5,
118 PA12_PF_LD6,
119 PA13_PF_LD7,
120 PA14_PF_LD8,
121 PA15_PF_LD9,
122 PA16_PF_LD10,
123 PA17_PF_LD11,
124 PA18_PF_LD12,
125 PA19_PF_LD13,
126 PA20_PF_LD14,
127 PA21_PF_LD15,
128 PA22_PF_LD16,
129 PA23_PF_LD17,
130 PA28_PF_HSYNC,
131 PA29_PF_VSYNC,
132 PA30_PF_CONTRAST,
133 LCD_ENABLE | GPIO_GPIO | GPIO_OUT,
134 LCD_RESET | GPIO_GPIO | GPIO_OUT,
135 /* SSI4 */
136 PC16_PF_SSI4_FS,
137 PC17_PF_SSI4_RXD,
138 PC18_PF_SSI4_TXD,
139 PC19_PF_SSI4_CLK,
140 };
141
142 static const struct imxuart_platform_data uart_pdata __initconst = {
143 .flags = IMXUART_HAVE_RTSCTS,
144 };
145
146 /*
147 * Matrix keyboard
148 */
149
150 static const uint32_t mx27_3ds_keymap[] = {
151 KEY(0, 0, KEY_UP),
152 KEY(0, 1, KEY_DOWN),
153 KEY(1, 0, KEY_RIGHT),
154 KEY(1, 1, KEY_LEFT),
155 KEY(1, 2, KEY_ENTER),
156 KEY(2, 0, KEY_F6),
157 KEY(2, 1, KEY_F8),
158 KEY(2, 2, KEY_F9),
159 KEY(2, 3, KEY_F10),
160 };
161
162 static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = {
163 .keymap = mx27_3ds_keymap,
164 .keymap_size = ARRAY_SIZE(mx27_3ds_keymap),
165 };
166
mx27_3ds_sdhc1_init(struct device * dev,irq_handler_t detect_irq,void * data)167 static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
168 void *data)
169 {
170 return request_irq(gpio_to_irq(SD1_CD), detect_irq,
171 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, "sdhc1-card-detect", data);
172 }
173
mx27_3ds_sdhc1_exit(struct device * dev,void * data)174 static void mx27_3ds_sdhc1_exit(struct device *dev, void *data)
175 {
176 free_irq(gpio_to_irq(SD1_CD), data);
177 }
178
179 static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
180 .init = mx27_3ds_sdhc1_init,
181 .exit = mx27_3ds_sdhc1_exit,
182 };
183
mx27_3ds_sdhc1_enable_level_translator(void)184 static void mx27_3ds_sdhc1_enable_level_translator(void)
185 {
186 /* Turn on TXB0108 OE pin */
187 gpio_request(SD1_EN_GPIO, "sd1_enable");
188 gpio_direction_output(SD1_EN_GPIO, 1);
189 }
190
191
otg_phy_init(void)192 static int otg_phy_init(void)
193 {
194 gpio_request(OTG_PHY_RESET_GPIO, "usb-otg-reset");
195 gpio_direction_output(OTG_PHY_RESET_GPIO, 0);
196 mdelay(1);
197 gpio_set_value(OTG_PHY_RESET_GPIO, 1);
198 return 0;
199 }
200
mx27_3ds_otg_init(struct platform_device * pdev)201 static int mx27_3ds_otg_init(struct platform_device *pdev)
202 {
203 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
204 }
205
206 static struct mxc_usbh_platform_data otg_pdata __initdata = {
207 .init = mx27_3ds_otg_init,
208 .portsc = MXC_EHCI_MODE_ULPI,
209 };
210
211 static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
212 .operating_mode = FSL_USB2_DR_DEVICE,
213 .phy_mode = FSL_USB2_PHY_ULPI,
214 };
215
216 static bool otg_mode_host __initdata;
217
mx27_3ds_otg_mode(char * options)218 static int __init mx27_3ds_otg_mode(char *options)
219 {
220 if (!strcmp(options, "host"))
221 otg_mode_host = true;
222 else if (!strcmp(options, "device"))
223 otg_mode_host = false;
224 else
225 pr_info("otg_mode neither \"host\" nor \"device\". "
226 "Defaulting to device\n");
227 return 1;
228 }
229 __setup("otg_mode=", mx27_3ds_otg_mode);
230
231 /* Regulators */
232 static struct regulator_init_data gpo_init = {
233 .constraints = {
234 .boot_on = 1,
235 .always_on = 1,
236 }
237 };
238
239 static struct regulator_consumer_supply vmmc1_consumers[] = {
240 REGULATOR_SUPPLY("vcore", "spi0.0"),
241 };
242
243 static struct regulator_init_data vmmc1_init = {
244 .constraints = {
245 .min_uV = 2800000,
246 .max_uV = 2800000,
247 .apply_uV = 1,
248 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
249 REGULATOR_CHANGE_STATUS,
250 },
251 .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
252 .consumer_supplies = vmmc1_consumers,
253 };
254
255 static struct regulator_consumer_supply vgen_consumers[] = {
256 REGULATOR_SUPPLY("vdd", "spi0.0"),
257 };
258
259 static struct regulator_init_data vgen_init = {
260 .constraints = {
261 .min_uV = 1800000,
262 .max_uV = 1800000,
263 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
264 },
265 .num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
266 .consumer_supplies = vgen_consumers,
267 };
268
269 static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = {
270 {
271 .id = MC13783_REG_VMMC1,
272 .init_data = &vmmc1_init,
273 }, {
274 .id = MC13783_REG_VGEN,
275 .init_data = &vgen_init,
276 }, {
277 .id = MC13783_REG_GPO1, /* Turn on 1.8V */
278 .init_data = &gpo_init,
279 }, {
280 .id = MC13783_REG_GPO3, /* Turn on 3.3V */
281 .init_data = &gpo_init,
282 },
283 };
284
285 /* MC13783 */
286 static struct mc13xxx_codec_platform_data mx27_3ds_codec = {
287 .dac_ssi_port = MC13783_SSI1_PORT,
288 .adc_ssi_port = MC13783_SSI1_PORT,
289 };
290
291 static struct mc13xxx_platform_data mc13783_pdata = {
292 .regulators = {
293 .regulators = mx27_3ds_regulators,
294 .num_regulators = ARRAY_SIZE(mx27_3ds_regulators),
295
296 },
297 .flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC |
298 MC13XXX_USE_CODEC,
299 .codec = &mx27_3ds_codec,
300 };
301
302 static struct imx_ssi_platform_data mx27_3ds_ssi_pdata = {
303 .flags = IMX_SSI_DMA | IMX_SSI_NET,
304 };
305
306 /* SPI */
307 static int spi1_chipselect[] = {SPI1_SS0};
308
309 static const struct spi_imx_master spi1_pdata __initconst = {
310 .chipselect = spi1_chipselect,
311 .num_chipselect = ARRAY_SIZE(spi1_chipselect),
312 };
313
314 static int spi2_chipselect[] = {SPI2_SS0};
315
316 static const struct spi_imx_master spi2_pdata __initconst = {
317 .chipselect = spi2_chipselect,
318 .num_chipselect = ARRAY_SIZE(spi2_chipselect),
319 };
320
321 static struct imx_fb_videomode mx27_3ds_modes[] = {
322 { /* 480x640 @ 60 Hz */
323 .mode = {
324 .name = "Epson-VGA",
325 .refresh = 60,
326 .xres = 480,
327 .yres = 640,
328 .pixclock = 41701,
329 .left_margin = 20,
330 .right_margin = 41,
331 .upper_margin = 10,
332 .lower_margin = 5,
333 .hsync_len = 20,
334 .vsync_len = 10,
335 .sync = FB_SYNC_OE_ACT_HIGH |
336 FB_SYNC_CLK_INVERT,
337 .vmode = FB_VMODE_NONINTERLACED,
338 .flag = 0,
339 },
340 .bpp = 16,
341 .pcr = 0xFAC08B82,
342 },
343 };
344
345 static const struct imx_fb_platform_data mx27_3ds_fb_data __initconst = {
346 .mode = mx27_3ds_modes,
347 .num_modes = ARRAY_SIZE(mx27_3ds_modes),
348 .pwmr = 0x00A903FF,
349 .lscr1 = 0x00120300,
350 .dmacr = 0x00020010,
351 };
352
353 /* LCD */
354 static struct l4f00242t03_pdata mx27_3ds_lcd_pdata = {
355 .reset_gpio = LCD_RESET,
356 .data_enable_gpio = LCD_ENABLE,
357 };
358
359 static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
360 {
361 .modalias = "mc13783",
362 .max_speed_hz = 1000000,
363 .bus_num = 1,
364 .chip_select = 0, /* SS0 */
365 .platform_data = &mc13783_pdata,
366 /* irq number is run-time assigned */
367 .mode = SPI_CS_HIGH,
368 }, {
369 .modalias = "l4f00242t03",
370 .max_speed_hz = 5000000,
371 .bus_num = 0,
372 .chip_select = 0, /* SS0 */
373 .platform_data = &mx27_3ds_lcd_pdata,
374 },
375 };
376
377 static const struct imxi2c_platform_data mx27_3ds_i2c0_data __initconst = {
378 .bitrate = 100000,
379 };
380
mx27pdk_init(void)381 static void __init mx27pdk_init(void)
382 {
383 imx27_soc_init();
384
385 mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins),
386 "mx27pdk");
387 imx27_add_imx_uart0(&uart_pdata);
388 imx27_add_fec(NULL);
389 imx27_add_imx_keypad(&mx27_3ds_keymap_data);
390 imx27_add_imx2_wdt();
391
392 imx27_add_spi_imx1(&spi2_pdata);
393 imx27_add_spi_imx0(&spi1_pdata);
394
395 imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data);
396 imx27_add_imx_fb(&mx27_3ds_fb_data);
397
398 imx27_add_imx_ssi(0, &mx27_3ds_ssi_pdata);
399 }
400
mx27pdk_late_init(void)401 static void __init mx27pdk_late_init(void)
402 {
403 mx27_3ds_sdhc1_enable_level_translator();
404 imx27_add_mxc_mmc(0, &sdhc1_pdata);
405
406 otg_phy_init();
407
408 if (otg_mode_host) {
409 otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
410 ULPI_OTG_DRVVBUS_EXT);
411
412 if (otg_pdata.otg)
413 imx27_add_mxc_ehci_otg(&otg_pdata);
414 }
415
416 if (!otg_mode_host)
417 imx27_add_fsl_usb2_udc(&otg_device_pdata);
418
419 mx27_3ds_spi_devs[0].irq = gpio_to_irq(PMIC_INT);
420 spi_register_board_info(mx27_3ds_spi_devs,
421 ARRAY_SIZE(mx27_3ds_spi_devs));
422
423 if (mxc_expio_init(MX27_CS5_BASE_ADDR, IMX_GPIO_NR(3, 28)))
424 pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n");
425
426
427 imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);
428 }
429
mx27pdk_timer_init(void)430 static void __init mx27pdk_timer_init(void)
431 {
432 mx27_clocks_init(26000000);
433 }
434
435 MACHINE_START(MX27_3DS, "Freescale MX27PDK")
436 /* maintainer: Freescale Semiconductor, Inc. */
437 .atag_offset = 0x100,
438 .map_io = mx27_map_io,
439 .init_early = imx27_init_early,
440 .init_irq = mx27_init_irq,
441 .init_time = mx27pdk_timer_init,
442 .init_machine = mx27pdk_init,
443 .init_late = mx27pdk_late_init,
444 .restart = mxc_restart,
445 MACHINE_END
446